IP Library Granted Patent US 10,008,628
Granted Patent B2
US 10,008,628 · App. 15/340,560 · Granted Jun 26, 2018

Thin-film semiconductor optoelectronic device with textured front and/or back surface prepared from template layer and etching

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Quick Facts
Patent No.
US 10,008,628
App. No.
15/340,560
Granted
Jun 26, 2018
Kind
B2
Abstract

A method for providing a textured layer in an optoelectronic device is disclosed. The method includes depositing a template layer on a first layer. The template layer has significant inhomogeneity either in thickness or in composition, or both, including the possibility of forming one or more islands to provide at least one textured surface of the island layer. The method also includes exposing the template layer and the first layer to an etching process to create or alter at least one textured surface. The altered at least one textured surface is operative to cause scattering of light.

Claims (43)

1. A method for providing a textured layer in an optoelectronic device, the method comprising:

epitaxially growing a template layer of islands on a planar semiconductor layer wherein the template layer has significant inhomogeneity in thickness; and

exposing the template layer and the planar semiconductor layer to an etching process, to create at least one textured surface in the planar semiconductor layer using the template layer as an etching mask.

2. The method of claim 1 , wherein the at least one textured surface is operative to cause scattering of light.

3. The method of claim 1 , wherein the template layer is formed by physical vapor deposition, chemical vapor deposition, liquid phase deposition, lithography, or liquid coating.

4. The method of claim 1 , wherein the etching process is done by a liquid or solution-based chemical etchant.

5. The method of claim 1 , wherein etching process is done by a technique from the group consisting of gas etching, laser etching, plasma etching, or ion etching.

6. The method of claim 1 , wherein the template layer itself is not etched.

7. The method of claim 1 , wherein the template layer itself is etched.

8. The method of claim 1 , wherein the etching process is selective to etch the planar semiconductor layer more rapidly than the template layer.

9. The method of claim 1 , wherein the etching process is selective to etch certain material compositions contained within the template layer more rapidly than certain other material compositions within the template layer.

10. The method of claim 1 , wherein the template layer is formed due to a lattice mismatch between the template layer and the planar semiconductor layer, on which the template layer is epitaxially grown.

11. The method of claim 1 , wherein the template layer is thin enough to incompletely cover the planar semiconductor layer on which it is epitaxially grown.

12. The method of claim 1 , wherein the template layer includes a plurality of islands.

13. The method of claim 12 , wherein the plurality of islands have variable dimensions relative to each other.

14. The method of claim 1 , wherein the at least one textured surface causes photons to scatter at randomized angles.

15. The method of claim 1 , wherein the template layer is a semiconductor and includes at least one of the group consisting of: gallium, aluminum, indium, phosphorus, nitrogen, and arsenic.

16. The method of claim 1 , wherein the template layer has a larger band gap than the planar semiconductor layer.

17. The method of claim 1 , wherein the template layer is transparent.

18. The method of claim 1 , wherein the template layer is formed using a Stranski-Krastanov process.

19. The method of claim 1 , wherein the template layer is formed using a Volmer-Weber process.

20. The method of claim 1 , further comprising depositing a dielectric layer over the template layer.

21. The method of claim 1 , further comprising depositing a transparent conducting oxide (TCO) layer over the template layer.

22. The method of claim 1 , further comprising depositing an anti-reflective coating on the at least one textured surface.

23. The method of claim 1 , further comprising depositing a metal reflective layer over the template layer.

24. The method of claim 23 , wherein a dielectric layer between the metal reflective layer and the planar semiconductor layer is provided with apertures allowing a conductive contact between the metal reflective layer and the planar semiconductor layer or the template layer, or both.

25. The method of claim 1 , wherein the at least one textured surface is a back reflector layer positioned further from the front of the optoelectronic device than a p-n junction of the optoelectronic device.

26. The method of claim 1 , wherein the at least one textured surface is a front window layer positioned closer to the front of the optoelectronic device than a p-n junction of the optoelectronic device.

27. The method of claim 1 further comprising: depositing a semiconductor contact layer over the template layer; and depositing a dielectric layer over the semiconductor contact layer.

28. A textured surface in a photovoltaic device, the textured surface fabricated using the method of claim 1 , the textured surface including the at least one textured surface.

29. A method for providing an optoelectronic device, the method comprising:

depositing an emitter layer and an absorber layer;

depositing a first planar layer of a first material over the emitter layer and the absorber layer;

epitaxially growing a template layer of a second material on the first planar layer wherein the template layer has significant inhomogeneity in thickness;

exposing the template layer and the first planar layer to an etching process to create at least one textured surface in the first planar layer using the template layer as an etching mask, wherein the at least one textured surface is operative to cause scattering of light;

depositing a dielectric layer over the template layer; and

depositing a metal layer over the dielectric layer.

30. A method for providing an optoelectronic device, the method comprising:

depositing an emitter layer and an absorber layer;

depositing a first planar layer of a first material over the emitter layer and the absorber layer;

epitaxially growing a template layer of a second material on the first planar layer, the template layer having one or more islands of the second material;

exposing the template layer and the first planar layer to an etching process to create at least one textured surface in the first planar layer, wherein at least one textured surface is operative to cause scattering of light; and

then depositing an anti-reflective layer over the template layer.

Assignments (5)
SECURITY INTEREST Recorded Aug 28, 2023
From: UTICA LEASECO, LLC
To: TIGER FINANCE, LLC
Reel/Frame 064731/0814 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED AT REEL: 055766 FRAME: 0279. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 9, 2021
From: UTICA LEASECO, LLC SECURED PARTY
To: UTICA LEASECO, LLC ASSIGNEE
Reel/Frame 057117/0811 →
CONFIRMATION OF FORECLOSURE TRANSFER OF PATENT RIGHTS Recorded Feb 25, 2021
From: UTICA LEASECO, LLC SECURED PARTY
To: UTICA LEASECO, LLC ASSIGNEE
Reel/Frame 055766/0279 →
SECURITY INTEREST Recorded Apr 29, 2019
From: ALTA DEVICES, INC.
To: UTICA LEASECO, LLC
Reel/Frame 049027/0944 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2016
From: DING, I-KANG; KAYES, BRENDAN M.; TWIST, ROSE; SPRUYTTE, SYLVIA; LIU, FENG; HIGASHI, GREGG; ARCHER, MELISSA J.; HE, GANG
To: ALTA DEVICES, INC.
Reel/Frame 040195/0471 →