Semiconductor storage device
View Patent ↗A semiconductor memory solves performance degradation of a memory device caused by performance of memory functions different depending on a position of a memory cell array. In the memory cell array including memory cells in each of which a memory element is electrically connected to one of a source and a drain of a cell transistor, the cell transistor includes at least two types with different current driving capability according to a position in the memory cell array.
1. A semiconductor storage device comprising:
a memory cell array; and
a driver circuit that drives the memory cell array, the driver circuit being connected to the memory cell array,
the memory cell array comprising memory cells,
each of the memory cells comprising:
a memory element; and
a cell transistor, one of a source and a drain of the cell transistor being electrically connected to the memory element, wherein:
cell transistors of the memory cells include at least two types of cell transistors with different current driving capability according to a position in the memory cell array,
the cell transistor of each of the memory cells having a long electric connection path from the driver circuit has larger current driving capability than the cell transistor of each of the memory cells having a short electric connection path from the driver circuit,
a terminal of each of cell transistor is connected to a source line,
the other terminal of each of cell transistor is connected to a bit line,
the driver circuit is connected to an end of the source line and an end of the bit line, drives current from the source line to the drive circuit through the bit line, and is arranged integrally, and
the source line and the bit line in the memory cell array are extended in the same direction.
2. The semiconductor storage device according to claim 1 , wherein the memory element is a resistance change element.
3. The semiconductor storage device according to claim 1 , wherein:
the memory cell array is divided into a plurality of regions, and
the current driving capability of the cell transistor in each of the plurality of regions is different.
4. The semiconductor storage device according to claim 1 , wherein the at least two types of cell transistors have gate widths different from each other.
5. The semiconductor storage device according to claim 1 , wherein the at least two types of cell transistors have gate lengths different from each other.
6. The semiconductor storage device according to claim 1 , wherein the driver circuit is provided commonly to the memory cells.