IP Library Granted Patent US 10,128,903
Granted Patent B2
US 10,128,903 · App. 15/347,250 · Granted Nov 13, 2018

System and method of cancelling floquet mode resonance and far end crosstalk, and mitigating crosstalk in a printed circuit board

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Quick Facts
Patent No.
US 10,128,903
App. No.
15/347,250
Granted
Nov 13, 2018
Kind
B2
Abstract

A method includes providing a first circuit trace and a second circuit trace on a printed circuit board, determining a far end cross-talk (FEXT) response associated with the first circuit trace, determining a time delay associated with the second circuit trace, estimating a floquet response associated with the time delay, comparing the FEXT response with an interface frequency associated with the first circuit trace, comparing the floquet response with the interface frequency, and determining whether the floquet response cancels the FEXT response on the first circuit trace at the interface frequency.

Claims (96)

1. A method comprising:

providing, on a first printed circuit board, a first circuit trace and a second circuit trace;

determining a first far end cross-talk (FEXT) response associated with the first circuit trace;

determining a first time delay associated with the second circuit trace;

estimating a first floquet response associated with the first time delay;

comparing the first FEXT response with a first interface frequency associated with the first circuit trace;

comparing the first floquet response with the first interface frequency; and

determining whether the first floquet response cancels the first FEXT response on the first circuit trace at the first interface frequency.

2. The method of claim 1 , further comprising providing, on a second printed circuit board, a redesigned first circuit trace when the first floquet response does not cancel the first FEXT response on the first circuit trace at the first interface frequency.

3. The method of claim 2 , further comprising:

determining a second FEXT response associated with the redesigned first circuit trace;

comparing the second FEXT response with the first interface frequency; and

determining whether the first floquet response cancels the second FEXT response on the redesigned first circuit trace at the first interface frequency.

4. The method of claim 1 , further comprising providing, on a second printed circuit board, a redesigned second circuit trace when the first floquet response does not cancel the first FEXT response on the first circuit trace at the first interface frequency.

5. The method of claim 4 , further comprising:

determining a second time delay associated with the redesigned second circuit trace;

estimating a second floquet response associated with the second time delay;

comparing the second floquet response with the first interface frequency; and

determining whether the second floquet response cancels the first FEXT response on the first circuit trace at the first interface frequency.

6. The method of claim 1 , wherein the floquet frequency is determined as

f

floquet

=

1

2

t

delay

,

where f floquet is the floquet frequency, and t delay is the time delay.

7. The method of claim 1 , wherein in determining the time delay, the method further comprises averaging a first unit cell length and a second unit cell length.

8. The method of claim 7 , wherein in determining the time delay, the method further comprises calculating an equivalent dielectric constant for the first printed circuit board.

9. The method of claim 1 , wherein in determining the time delay, the method further comprises calculating the time delay as

t

delay

=

l

avg

v

,

where l avg is an average of a first unit cell length and a second unit cell length, and v is a propagation velocity in the first printed circuit board.

10. The method of claim 1 , wherein in determining the time delay, the method further comprises determining a propagation delay in the first circuit trace and the second circuit trace using a time domain reflectometer.

11. A non-transitory computer-readable medium including code for performing a method, the method comprising:

providing, on a first printed circuit board, a first circuit trace and a second circuit trace;

determining a first far end cross-talk (FEXT) response associated with the first circuit trace;

determining a first time delay associated with the second circuit trace;

estimating a first floquet response associated with the first time delay;

comparing the first FEXT response with a first interface frequency associated with the first circuit trace;

comparing the first floquet response with the first interface frequency; and

determining whether the first floquet response cancels the first FEXT response on the first circuit trace at the first interface frequency.

12. The non-transitory computer-readable medium of claim 11 , further comprising:

providing, on a second printed circuit board, a redesigned first circuit trace when the first floquet response does not cancel the first FEXT response on the first circuit trace at the first interface frequency.

13. The non-transitory computer-readable medium of claim 12 , further comprising:

determining a second FEXT response associated with the redesigned first circuit trace;

comparing the second FEXT response with the first interface frequency;

determining whether the first floquet response cancels the second FEXT response on the redesigned first circuit trace at the first interface frequency.

14. The non-transitory computer-readable medium of claim 11 , further comprising:

providing, on a second printed circuit board, a redesigned second circuit trace when the first floquet response does not cancel the first FEXT response on the first circuit trace at the first interface frequency.

15. The non-transitory computer-readable medium of claim 14 , wherein further comprising:

determining a second time delay associated with the redesigned second circuit trace;

estimating a second floquet response associated with the second time delay;

comparing the second floquet response with the first interface frequency; and

determining whether the second floquet response cancels the first FEXT response on the first circuit trace at the first interface frequency.

16. The non-transitory computer-readable medium of claim 11 , wherein the floquet frequency is determined as

f

floquet

=

1

2

t

delay

,

where f floquet is the floquet frequency, and t delay is the time delay.

17. The non-transitory computer-readable medium of claim 11 , wherein in determining the time delay, the method further comprises averaging a first unit cell length and a second unit cell length.

18. The non-transitory computer-readable medium of claim 11 , wherein in determining the time delay, the method further comprises:

calculating the time delay as

t

delay

=

l

avg

v

,

 where l avg is an average of a first unit cell length and a second unit cell length, and v is a propagation velocity in the first printed circuit board.

19. The non-transitory computer-readable medium of claim 11 , wherein in determining the time delay, the method further comprises determining a propagation delay in the first circuit trace and the second circuit trace using a time domain reflectometer.

20. An information handling system comprising:

a memory for storing code; and

a processor configured to execute code to:

provide, on a first printed circuit board, a first circuit trace and a second circuit trace;

determine a first far end cross-talk (FEXT) response associated with the first circuit trace;

determine a first time delay associated with the second circuit trace;

estimate a first floquet response associated with the first time delay;

compare the first FEXT response with a first interface frequency associated with the first circuit trace;

compare the first floquet response with the first interface frequency; and

determine whether the first floquet response cancels the first FEXT response on the first circuit trace at the first interface frequency.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (041829/0873) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0724 →
RELEASE OF SECURITY INTEREST AT REEL 048825 FRAME 0489 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058000/0916 →
RELEASE OF SECURITY INTEREST AT REEL 041808 FRAME 0516 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL INTERNATIONAL, L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058297/0573 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Apr 8, 2019
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 048825/0489 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY INTEREST (NOTES) Recorded Feb 28, 2017
From: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 041829/0873 →
PATENT SECURITY INTEREST (CREDIT) Recorded Feb 24, 2017
From: DELL INTERNATIONAL, L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 041808/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2016
From: CHADA, ARUN R.; MUTNURY, BHYRAV M.
To: DELL PRODUCTS, LP
Reel/Frame 040670/0783 →