IP Library Granted Patent US 10,886,879
Granted Patent B2
US 10,886,879 · App. 15/350,460 · Granted Jan 5, 2021

Digital modulator and digital-to-analog conversion techniques associated therewith

Inventor: Elmar Wagner (Taufkirchen, DE)
Assignee: Intel Deutschland GmbH
H03C5/00H03C1/52
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Quick Facts
Patent No.
US 10,886,879
App. No.
15/350,460
Granted
Jan 5, 2021
Kind
B2
Abstract

The transmitter includes a digital modulator adapted to provide a digital modulated RF signal based on a multi-bit representation of data and a multi-bit representation of a carrier wave. A digital-to-analog converter (DAC) is adapted to generate an analog modulated RF signal based on the digital modulated RF signal. A resonant circuit coupled to an output of the DAC and adapted to filter undesired frequency components from the analog modulated RF signal.

Claims (20)

1. A circuit that includes a digital modulator, the digital modulator comprising:

a differentiator to receive successive phase values at a sampling rate and provide differentiated phase values based on the phase values;

an adder to provide successive instantaneous phase offset values at the sampling rate based on both the differentiated phase values and a frequency control word;

a phase accumulator to provide successive instantaneous phase values at the sampling rate based on the instantaneous phase offset values; and

an angle-to-amplitude converter to convert the instantaneous phase values to a multi-bit representation of a phase modulated wave at the sampling rate.

2. The circuit of claim 1 , where the digital modulator further comprises:

a multiplier to receive successive amplitude values and the multi-bit representation of the phase modulated wave at the sampling rate; and the multiplier to output a multi-bit amplitude-and-phase-modulated signal that changes in time according to the sampling rate.

3. The circuit of claim 2 , further comprising:

a baseband processor to provide both the successive phase values and a frequency control word to the digital modulator, where the frequency control word is associated with a frequency channel over which the phase modulated wave is to be transmitted.

4. The circuit of claim 3 , where the baseband processor provides the phase values in I-Q format, the circuit further comprising:

a cordic to convert the phase values in I-Q format to phase values in polar format.

5. The circuit of claim 1 , further comprising:

a digital-to-analog converter (DAC) to generate an analog modulated RF signal based on the multi-bit representation of the phase modulated wave.

6. The circuit of claim 5 , further comprising:

a digital up-conversion element operably coupled between the DAC and the angle-to-amplitude converter, where the digital up-conversion element increases a frequency of the phase modulated wave from a first frequency to a second frequency; and

a digital filter operably coupled between the digital up-conversion element and the DAC, and configured to block values associated with unwanted frequencies at the output of the digital up-conversion element.

7. The circuit of claim 5 , further comprising:

a resonant circuit coupled to an output of the DAC and adapted to filter undesired frequency components from the analog modulated RF signal.

8. The circuit of claim 1 , wherein the angle-to-amplitude converter comprises a look up table (LUT) that comprises a memory configured to map the instantaneous phase values to respective amplitude values that correspond to the multi-bit representation of the phase modulated wave.

9. The circuit of claim 8 , wherein the LUT comprises a sine or cosine LUT configured to perform the mapping.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2022
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 061356/0001 →
Continuity (2)
Continuation 12699560 · Feb 3, 2010
Related Publication 20170250652A1 · Aug 31, 2017