IP Library Granted Patent US 9,577,530
Granted Patent B1
US 9,577,530 · App. 15/356,425 · Granted Feb 21, 2017

Boost converter with zero voltage switching

Inventors: Tom Ribarich (Laguna Beach, CA); Jason Zhang (Monterey Park, CA)
Assignee: Navitas Semiconductor, Inc.
H02M3/158H02M1/42H02M1/44
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Quick Facts
Patent No.
US 9,577,530
App. No.
15/356,425
Granted
Feb 21, 2017
Kind
B1
Abstract

A power converter circuit is disclosed. The circuit includes a capacitor connected across first and second output terminals, an inductor configured to receive current from a power source, and a main switch configured to selectively conduct current from the inductor to a ground. The circuit also includes a diode configured to conduct current from the inductor to the capacitor, and a second switch connected in parallel with the diode, where the second switch is configured to selectively conduct current from the capacitor to the inductor.

Claims (29)

1. A power converter circuit, comprising:

a capacitor connected across first and second output terminals;

an inductor, configured to receive current from a power source;

a main switch, configured to selectively conduct current from the inductor to a ground;

a diode, configured to conduct current from the inductor to the capacitor; and

a second switch connected in parallel with the diode, wherein the second switch is configured to selectively conduct current from the capacitor to the inductor.

2. The circuit of claim 1 , wherein the main switch is configured to become conductive while the voltage across the main switch is substantially 0 V.

3. The circuit of claim 1 , further comprising a controller configured to generate signals controlling the conductive states of the main switch and the second switch.

4. The circuit of claim 1 , wherein the diode is configured to conduct the current from the inductor to the capacitor while the main switch is non-conductive.

5. The circuit of claim 1 , wherein the second switch is configured to conduct the current from the inductor to the capacitor while the main switch is non-conductive.

6. The circuit of claim 1 , wherein the second switch is configured to conduct current from the capacitor to the inductor while the main switch is non-conductive.

7. The circuit of claim 1 , wherein the inductor is configured to conduct current from the main switch and from the second switch while the main switch and the second switch are non-conductive, such that the voltage across the main switch becomes substantially 0 V.

8. The circuit of claim 7 , wherein the main switch is configured to become conductive as a result of the voltage across the main switch becoming substantially 0 V.

9. The circuit of claim 1 , wherein the main switch is configured to be conductive for a duration based on an output voltage of the circuit.

10. The circuit of claim 1 , wherein the second switch is configured to become non-conductive in response to current flowing from the capacitor to the inductor having a minimum magnitude.

11. The circuit of claim 1 , wherein the second switch is configured to become conductive in response to a decrease in the difference between the voltages at the drain and source of the second switch.

12. A method of operating a power converter circuit comprising a capacitor connected across first and second output terminals, an inductor configured to receive current from a power source, a main switch, a diode, and a second switch connected in parallel with the diode, the method comprising:

conducting current from a power source to the inductor;

selectively conducting current from the inductor to a ground;

with the diode, conducting current from the inductor to the capacitor; and

with the second switch, selectively conducting current from the capacitor to the inductor.

13. The method of claim 12 , further comprising causing the main switch to become conductive while the voltage across the main switch is substantially 0 V.

14. The method of claim 12 , wherein the diode conducts the current from the inductor to the capacitor while the main switch is non-conductive.

15. The method of claim 12 , wherein the second switch conducts the current from the inductor to the capacitor while the main switch is non-conductive.

16. The method of claim 12 , wherein the second switch conducts current from the capacitor to the inductor while the main switch is non-conductive.

17. The method of claim 12 , wherein the inductor conducts current from the main switch and from the second switch while the main switch and the second switch are non-conductive, such that the voltage across the main switch becomes substantially 0 V, and wherein the main switch becomes conductive as a result of the voltage across the main switch becoming substantially 0 V.

18. The method of claim 12 , wherein the main switch is conductive for a duration based on an output voltage of the circuit.

19. The method of claim 12 , further comprising causing the second switch to become non-conductive in response to current flowing from the capacitor to the inductor having a minimum magnitude.

20. The method of claim 12 , further comprising causing the second switch to become conductive in response to a decrease in the difference between the voltages at the drain and source of the second switch.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT DOCUMENTS AND THE RECEIVING PARTY'S POSTAL CODE PREVIOUSLY RECORDED AT REEL: 053864 FRAME: 0208. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 9, 2021
From: NAVITAS SEMICONDUCTOR, INC.
To: NAVITAS SEMICONDUCTOR LIMITED
Reel/Frame 056758/0314 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2020
From: NAVITAS SEMICONDUCTOR, INC.
To: NAVITAS SEMICONDUCTOR LIMITED
Reel/Frame 053864/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2016
From: RIBARICH, TOM; ZHANG, JASON
To: NAVITAS SEMICONDUCTOR, INC.
Reel/Frame 040653/0333 →
Continuity (1)
Provisional Application 62258167 · Nov 20, 2015