Cascode power amplifier with switchable output matching network

1. A radio-frequency module comprising:

a power amplifier including a driver transistor coupled at a base thereof to a radio-frequency signal input path and a cascode transistor coupled at a collector thereof to a radio-frequency output signal path, an emitter of the cascode transistor being coupled to a base of the cascode transistor by a coupling path including a first capacitor;

an output matching network disposed in the radio-frequency output signal path, the output matching network including a first inductor and a shunt arm coupled to ground, the shunt arm including a second capacitor connected in series with a dynamically-switchable switch that is controllable to modify an operational impedance of the output matching network;

an inductive load coupled to the collector of the cascode transistor in parallel with the radio-frequency output signal path;

a bias circuit coupled to a radio-frequency input signal path of the power amplifier, the bias circuit including a current mirror having an output having a switchable resistance configured to selectively adjust how a voltage level on the radio-frequency signal input path increases a current through the power amplifier, the switchable resistance being coupled in parallel with the radio-frequency signal input path; and

an inter-stage matching circuit disposed in the radio-frequency input signal path, the inter-stage matching circuit including a second shunt arm connected between third and fourth capacitors, the second shunt arm including a second inductor coupled to ground.

2. The radio-frequency module of claim 1 wherein the output matching network is configured to present a first impedance when the switch is set in an OFF state for a high-power mode and present a second impedance when the switch is set in an ON state for a low-power mode, the second impedance being greater than the first impedance.

3. The radio-frequency module of claim 1 wherein the driver transistor is a first bipolar transistor and the cascode transistor is a second bipolar transistor, the driver transistor having a collector that is coupled to the emitter of the cascode transistor in a cascode configuration.

4. The radio-frequency module of claim 1 wherein the bias circuit includes a field-effect transistor disposed in an output path of the current mirror, the field-effect transistor including a gate terminal coupled to a switch control node and drain and source terminals coupled together via a first resistor of the switchable resistance.

5. The radio-frequency module of claim 4 wherein the first resistor is coupled in series with a second resistor of the switchable resistance disposed in the output path of the current mirror when the field-effect transistor is in an ON configuration.

6. The radio-frequency module of claim 1 wherein the first capacitor is an AM-PM distortion correcting capacitor.

7. A power amplifier circuit comprising:

a cascode transistor having an output at a collector thereof, the cascode transistor further including an emitter and base coupled together by a coupling path including a first capacitor;

a driver transistor coupled to the cascode transistor in a cascode configuration, the driver transistor having an input;

a radio-frequency output signal path coupled to the output of the cascode transistor at a first end and to a radio-frequency output port at a second end, the radio-frequency output signal path including a first series inductor;

a shunt output matching arm disposed in the radio-frequency output signal path, the shunt output matching arm including a second capacitor connected in series with a dynamically-switchable switch that is controllable to modify an operational impedance of the radio-frequency output signal path, the switch being configurable to selectively create an open circuit between the radio-frequency output signal path and a ground reference node;

bias circuitry coupled to the input of the driver transistor at an input node, the bias circuitry including a current source coupled to a base of a bias transistor, the bias transistor including a terminal coupled to an output current path that is coupled in parallel with the input of the driver transistor, the output current path including a switchable resistance configured to selectively adjust how a voltage level on the input of the driver transistor increases a current through the driver transistor, the switchable resistance being coupled in parallel with the input of the driver transistor; and

inter-stage matching circuitry coupled to the input node and including a shunt inter-stage matching arm connected between third and fourth capacitors, the shunt inter-stage matching arm including a second inductor coupled to ground.

8. The power amplifier circuit of claim 7 wherein the shunt output matching arm is configured to present a first impedance when the switch is set in an OFF state for a high-power mode and present a second impedance when the switch is set in an ON state for a low-power mode, the second impedance being greater than the first impedance.

9. The power amplifier circuit of claim 7 wherein the second capacitor is configured to block any and all direct-current signals from passing to ground through the shunt output matching arm.

10. The power amplifier circuit of claim 7 wherein the switchable resistance includes a first resistor, a second resistor, and a field-effect transistor coupled to first and second ends of the first resistor at a drain and a source, respectively.

11. A wireless device comprising:

an antenna;

a transceiver configured to generate a radio-frequency input signal;

a radio-frequency module configured to receive the radio-frequency input signal and provide a radio-frequency output signal to the antenna;

power amplifier circuitry associated with the radio-frequency module and configured to generate an amplified signal based at least in part on the radio-frequency input signal using an amplifying transistor and provide the amplified signal on an output terminal of the amplifying transistor, the radio-frequency output signal being based at least in part on the amplified signal;

power amplifier output matching circuitry coupled to the output terminal of the amplifying transistor, the power amplifier output matching circuitry including a first inductor and a first shunt arm coupled to ground, the first shunt arm including a first capacitor connected in series with a switch that is controllable to modify an operational impedance of the power amplifier output matching circuitry;

driver bias circuitry coupled to a radio-frequency input of the power amplifier circuitry, the driver bias circuitry including a current mirror having an output having a switchable resistance configured to selectively adjust how radio-frequency input signal increases a current through the amplifying transistor, the switchable resistance being coupled in parallel with the radio-frequency input and configured to modify an output resistance of the current mirror; and

inter-stage matching circuitry coupled to the radio-frequency input and including a second shunt arm connected between second and third capacitors, the second shunt arm including a second inductor coupled to ground.

12. The wireless device of claim 11 wherein the power amplifier output matching circuitry is configured to present a first impedance to the output terminal of the amplifying transistor when the switch is set in an OFF state for a high-power mode and present a second impedance to the output of the amplifying transistor when the switch is set in an ON state for a low-power mode, the second impedance being greater than the first impedance.

13. The wireless device of claim 11 wherein the output of the amplifying transistor is a collector of the amplifying transistor, the amplifying transistor including an emitter and base coupled together by a coupling path including a fourth capacitor.