IP Library Granted Patent US 9,838,031
Granted Patent B2
US 9,838,031 · App. 15/360,984 · Granted Dec 5, 2017

Dither injection for continuous-time MASH ADCS

Inventors: Yunzhi Dong (Weehawkin, NJ); Hajime Shibata (Toronto, CA); Trevor Clifford Caldwell (Toronto, CA); Zhao Li (North York, CA); Jialin Zhao (Santa Clara, CA); Jose Barreiro Silva (Bedford, MA)
Assignee: ANALOG DEVICES GLOBAL
H03M3/422H03M3/322H03M3/388H03M3/436H03M3/464H03M1/361H03M3/344H03M3/378H03M3/414
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Quick Facts
Patent No.
US 9,838,031
App. No.
15/360,984
Granted
Dec 5, 2017
Kind
B2
Abstract

For continuous-time multi-stage noise shaping analog to digital converters (CT MASH ADCs), quantization noise cancellation often requires estimation of transfer functions, e.g., a noise transfer function of the front end modulator. To estimate the noise transfer function, a dither signal can be injected in the front end modulator. However, it is not trivial how the dither signal can be injected, since the dither signal can potentially leak to the back end modulator and cause overall noise degradation. To address some of these issues, the dither signal is injected post the flash analog to digital converter (ADC) of the front end modulator. Furthermore, dummy comparator structures can be used to synchronize the dither with the quantization noise of the targeted flash ADC.

Claims (41)

1. A method for transfer function estimation, the method comprising:

injecting a dither signal at an output of a quantizer in a stage of a multi-stage noise shaping analog to digital converter (MASH ADC);

estimating a signal transfer function of a further stage subsequent to the stage based on the dither signal; and

programming a first digital filter based on the estimated signal transfer function.

2. The method of claim 1 , further comprising:

estimating a noise transfer function of the stage based on the dither signal; and

programming a second digital filter based on estimated noise transfer function.

3. The method of claim 2 , wherein estimating the noise transfer function comprises performing cross-correlation of the dither signal and a digital output of the stage.

4. The method of claim 2 , further comprising:

filtering, by the first digital filter, a digital output of the stage; and

filtering, by the second digital filter, a digital output of the further stage, wherein the further stage processes quantization noise introduced by the quantizer.

5. The method of claim 2 , wherein the first digital filter and the second digital filter cancel quantization noise introduced by the quantizer.

6. The method of claim 1 , wherein estimating the signal transfer function comprises performing cross-correlation of the dither signal and a digital output of the further stage.

7. The method of claim 1 , further comprising:

generating a dither bit stream by a dither generator; and

sampling the dither bit stream by a replica circuit to generate the dither signal, wherein the replica circuit replicates a circuit in the quantizer to substantially match timing of the dither signal with timing of an output signal of the quantizer.

8. The method of claim 7 , wherein the replica circuit replicates one or more of the following in the quantizer: a comparator, a clocked data latch, and a logic buffer.

9. A multi-stage noise shaping analog to digital converter (MASH ADC), the MASH ADC comprising:

a first stage having a quantizer and a feedback digital to analog converter (DAC);

a second stage to process a quantization noise of the quantizer;

dither circuitry to generate a dither signal, wherein the dither signal drives an input of the feedback DAC receiving the dither signal and an output of the quantizer;

first estimation circuitry for estimating a signal transfer function of the second stage based on the dither signal; and

a first digital filter for filtering a digital output of the first stage to cancel the quantization noise, the first digital filter having coefficients determined by the first estimation circuitry.

10. The MASH ADC claim 9 , further comprising:

second estimation circuitry for estimating a noise transfer function of the first stage; and

a second digital filter for filtering a digital output of the second stage to cancel the quantization noise, the second digital filter having coefficients determined by the second estimation circuitry.

11. The MASH ADC claim 9 , wherein the first estimation circuitry comprises a correlation block receiving the dither signal and a digital output of the second stage.

12. The MASH ADC of claim 9 , wherein the dither circuitry comprises a clocked pseudo random binary sequence generator which substantially matches timing of the dither signal with timing of an output signal of the quantizer.

13. The MASH ADC of claim 9 , wherein the dither circuitry comprises:

a dither generator for generating a dither bit stream; and

sampling circuitry for sampling the dither bit stream to generate the dither signal, wherein the sampling circuitry replicates clocked circuitry in the quantizer.

14. The MASH ADC of claim 13 , wherein the sampling circuitry comprises one or more of: a comparator, a clocked data latch, and a logic buffer.

15. The MASH ADC of claim 9 , wherein the first stage and the second stage are implemented with continuous time circuitry.

16. The MASH ADC of claim 9 , wherein the first stage is a first order delta sigma modulator and the second stage is a second order delta sigma modulator.

17. An apparatus for transfer function estimation, the apparatus comprising:

means for injecting a randomized digital bit stream into an output stream of a quantizer in a first stage of a multi-stage noise shaping analog to digital converter (MASH ADC); and

means for determining coefficients for a first digital filter using the randomized digital bit stream, wherein the first digital filter filters a digital output of the first stage the MASH ADC and the first digital filter matches a signal transfer function of a second stage subsequent to the first stage of the MASH ADC.

18. The apparatus of claim 17 , wherein means for injecting the randomized digital bit stream comprises means for matching timing of the randomized digital bit stream with timing of the output stream.

19. The apparatus of claim 17 , further comprising:

means for determining coefficients for a second digital filter using the randomized digital bit stream, wherein the second digital filter filters a digital output of the second stage, and the second digital filter matches a noise transfer function of the first stage of the MASH ADC.

20. The apparatus of claim 19 , wherein the first digital filter and the second digital filter cancel quantization noise introduced by the quantizer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2022
From: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
To: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Reel/Frame 059106/0826 →
CHANGE OF NAME Recorded Feb 24, 2022
From: ANALOG DEVICES GLOBAL
To: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
Reel/Frame 059095/0797 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2016
From: DONG, YUNZHI; SHIBATA, HAJIME; CALDWELL, TREVOR CLIFFORD; LI, ZHAO; ZHAO, JIALIN; SILVA, JOSE BARREIRO
To: ANALOG DEVICES GLOBAL
Reel/Frame 040502/0026 →
Continuity (2)
Provisional Application 62268034 · Dec 16, 2015
Related Publication 20170179975A1 · Jun 22, 2017