Semiconductor device and manufacturing method thereof
View Patent ↗Provided is a semiconductor device with improved performance. The semiconductor device includes a photodiode having a charge storage layer (n-type semiconductor region) and a surface layer (p-type semiconductor region), and a transfer transistor having a gate electrode and a floating diffusion. The surface layer (p-type semiconductor region) of a second conductive type formed over the charge storage layer (n-type semiconductor region) of a first conductive type includes a first sub-region having a low impurity concentration, and a second sub-region having a high impurity concentration. The first sub-region is arranged closer to the floating diffusion than the second sub-region.
1. A semiconductor device, comprising:
a semiconductor substrate having a main surface;
a transfer transistor formed on the main surface;
a photodiode formed in the semiconductor substrate adjacent the transfer transistor in plan view;
the transfer transistor including:
a gate electrode formed over the main surface via a gate insulation film;
a source region of a first conductivity type arranged at an end side of the gate electrode adjacent to the photodiode; and
a drain region of a first conductivity type arranged at the other end side of the gate electrode, and
the photodiode including:
a charge storage layer of a first conductivity type formed in the semiconductor substrate and also serving as the source region; and
a surface layer of a second conductivity type covering at least a portion of a top surface of the charge storage layer, the second conductivity type being opposite the first conductivity type,
wherein an impurity concentration of an upper portion of the surface layer is greater than an impurity concentration of a lower portion of the surface layer,
wherein the surface layer is spaced from the end side of the gate electrode in the plan view,
wherein an end portion of the surface layer on the side of the gate electrode in a cross-sectional view is covered with the charge storage layer,
wherein the surface layer comprises a first sub-region having a low impurity concentration, and a second sub-region having a higher impurity concentration than that of the first sub-region, and
wherein the second sub-region covers only a portion of an upper surface of the first sub-region.
2. A semiconductor device according to claim 1 ,
wherein the charge storage layer is formed by ion-implantation performed at an oblique angle inclined toward the gate electrode with respect to a normal line to the main surface of the semiconductor substrate.
3. A semiconductor device according to claim 1 ,
wherein a side surface of the second sub-region facing the gate electrode in a cross-sectional view is covered with the first sub-region.
4. A semiconductor device according to claim 1 ,
wherein the surface layer is obtained by ion-implantation performed at an oblique angle inclined toward the gate electrode with respect to a normal line to the main surface of the semiconductor substrate.
5. A semiconductor device according to claim 3 ,
wherein the first and second sub-regions are obtained by ion-implantation performed at respective first and second oblique angles inclined toward the gate electrode with respect to a normal line to the main surface of the semiconductor substrate.