Active device which has a high breakdown voltage, is memory-less, traps even harmonic signals and circuits used therewith
View Patent ↗An active device and circuits utilized therewith are disclosed. In an aspect, the active device comprises an n-type transistor having a drain, gate and bulk and a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor include a common source. The device includes a first capacitor coupled between the gate of the n-type transistor and the gate of the p-type transistor, a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor and a third capacitor coupled between the bulk of the n-type transistor and the bulk of p-type transistor. The active device has a high breakdown voltage, is memory less and traps even harmonic signals.
1. An amplifier, comprising:
an active device coupled to a tuning block,
the active device comprising:
an n-type transistor having a drain, gate and bulk;
a p-type transistor having a drain, gate and bulk; wherein the n-type transistor and the p-type transistor share a common source;
a first capacitor coupled between the gate of n-type transistor and the gate of p-type transistor;
a second capacitor coupled between the drain of n-type transistor and the drain of p-type transistor; and
a third capacitor coupled between the bulk of n-type transistor and the bulk of p-type transistor;
wherein the active device has a high breakdown voltage, is memory less and traps even harmonic signals.
2. The amplifier of claim 1 , the tuning block being coupled to the active device at the common source, wherein the amplifier comprises a common gate amplifier.
3. The amplifier of claim 2 , wherein each of the first, second and third capacitors individually comprises a passive capacitor or a variable capacitor.
4. The amplifier of claim 1 , wherein: the tuning block is coupled to each of:
the common source, and
the gates of the n-type and p-type transistors;
wherein the amplifier comprises a common source/common gate amplifier.
5. The amplifier of claim 4 , wherein each of the first, second and third capacitors comprises a passive capacitor or a variable capacitor.
6. The amplifier of claim 1 , wherein the tuning block comprising any combination of inductors, capacitors, resistors and transformers which comprises two inputs and one output.
7. The amplifier of claim 3 , wherein each of the first, second and third capacitors is individually configured as being coupled:
in series with a resistor;
in parallel with a resistor;
serially with an inductor; or
in parallel with an inductor.
8. The amplifier of claim 5 , wherein each of the first, second and third capacitors is individually configured as being coupled:
in series with a resistor;
in parallel with a resistor;
serially with an inductor; or
in parallel with an inductor.
9. The amplifier of claim 1 , further comprising a second active device, wherein the tuning block is further coupled to the second active device.
10. The amplifier of claim 9 , wherein:
a bulk node of an n-type transistor of the second active device is coupled to the bulk of the n-type transistor of the first active device; and
a bulk node of a p-type transistor of the second active device is coupled to the bulk of the p-type transistor of the first active device.
11. The amplifier of claim 10 , wherein each of the bulk nodes are further coupled to bias lines.
12. The amplifier of claim 9 , the second active device comprising:
an n-type transistor having a drain, gate and bulk;
a p-type transistor having a drain, gate and bulk;
wherein the gates of the n-type and p-type transistors of the second active device are coupled to the tuning block; and
wherein the gates of the n-type and p-type transistors of the other active device are coupled to the tuning block.
13. The amplifier of claim 1 , wherein: the tuning block is coupled:
the gates of the n-type and p-type transistors of the active device;
wherein the amplifier comprises a common gate amplifier.