Transistor, semiconductor device, and electronic device
To provide a transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device. By covering a side surface of an oxide semiconductor layer in which a channel is formed with an oxide semiconductor layer, diffusion of impurities into the inside from the side surface of the oxide semiconductor layer is prevented. By forming a gate electrode in a damascene process, miniaturization and high density of a transistor are achieved. By providing a protective layer covering a gate electrode over the gate electrode, the reliability of the transistor is increased.
1. A transistor comprising:
first to fourth electrodes;
first to fourth insulating layers;
first to third oxide semiconductor layers; and
first to third layers,
wherein the first and second oxide semiconductor layers have an island-like shape,
wherein the second oxide semiconductor layer is over the first oxide semiconductor layer,
wherein the second oxide semiconductor layer comprises a first region, a second region, and a third region,
wherein the third region is between the first region and the second region,
wherein the first electrode is over the first region,
wherein the second electrode is over the second region,
wherein the first layer is over the first electrode,
wherein the second layer is over the second electrode,
wherein the first insulating layer comprises a region overlapping with the first layer with the third layer between the region and the first layer,
wherein the first insulating layer comprises a region overlapping with the second layer with the third layer between the region and the second layer,
wherein the third layer comprises a first opening,
wherein the first insulating layer comprises a second opening,
wherein the first opening comprises a region overlapping with the third region,
wherein the second opening comprises a region overlapping with the third region,
wherein the third electrode is over the third region with the third oxide semiconductor layer and the second insulating layer between the third electrode and the third region,
wherein the third insulating layer is over the third electrode,
wherein the fourth electrode is under the third region with the fourth insulating layer between the fourth electrode and the third region,
wherein the third layer comprises a region in direct contact with a side surface of the second oxide semiconductor layer, and
wherein the third oxide semiconductor layer comprises a region in direct contact with the side surface of the second oxide semiconductor layer.
2. The transistor according to claim 1 , wherein the third layer comprises a region in direct contact with a side surface of the first oxide semiconductor layer.
3. The transistor according to claim 1 , wherein the third oxide semiconductor layer comprises a region in direct contact with a side surface of the first oxide semiconductor layer.
4. The transistor according to claim 1 , wherein the third insulating layer comprises a region overlapping with the third electrode, a region overlapping with the third oxide semiconductor layer, and a region overlapping with the second insulating layer.
5. The transistor according to claim 1 , wherein a channel is formed in the third region.
6. The transistor according to claim 1 , wherein the second oxide semiconductor layer comprises one or both of In and Zn.
7. The transistor according to claim 1 , wherein the first oxide semiconductor layer and the third oxide semiconductor layer comprises an element that is the same kind as at least one metal element contained in the second oxide semiconductor layer.
8. The transistor according to claim 1 , wherein the first layer and the second layer each comprise oxide semiconductor.
9. The transistor according to claim 1 , wherein the first and second electrodes each comprise nitrogen and tantalum.
10. The transistor according to claim 1 , wherein at least one of the third and fourth electrodes comprises nitrogen and tantalum.
11. The transistor according to claim 1 , wherein the fourth insulating layer comprises oxygen and aluminum.
12. The transistor according to claim 1 , wherein the fourth insulating layer comprises a stack of a plurality of layers.
13. A semiconductor device comprising:
the transistor according to claim 1 ; and
a capacitor or a resistor.
14. An electronic device comprising:
the semiconductor device according to claim 13 ; and
an antenna, a battery, an operation switch, a microphone, or a speaker.
15. A semiconductor wafer comprising:
a plurality of the semiconductor devices according to claim 13 ; and
a separation region.
16. A transistor comprising:
a first oxide semiconductor layer;
a first metal layer and a second metal layer over the first oxide semiconductor layer;
a first insulating layer having an opening over the first metal layer;
a second insulating layer having an opening over the second metal layer;
a second oxide semiconductor layer over the first insulating layer and the second insulating layer;
a gate insulating layer over the second oxide semiconductor layer;
a gate electrode over the gate insulating layer; and
a first electrode layer and a second electrode layer over the gate electrode,
wherein the first electrode layer is electrically connected to the first metal layer through the opening of the first insulating layer, and
wherein the second electrode layer is electrically connected to the second metal layer through the opening of the second insulating layer.
17. The transistor according to claim 16 , wherein the first insulating layer and the second insulating layer each comprise oxide semiconductor.
18. The transistor according to claim 16 , wherein the first oxide semiconductor layer comprises one or both of In and Zn.
19. The transistor according to claim 16 , wherein the first and second metal layers each comprise nitrogen and tantalum.
20. The transistor according to claim 16 , wherein the gate electrode comprises nitrogen and tantalum.
21. The transistor according to claim 16 ,
wherein the first oxide semiconductor layer having a recess portion, and
wherein the second oxide semiconductor layer is in direct contact with an inner side surface of the first oxide semiconductor layer in the recess portion and an outer side surface of the first oxide semiconductor layer.