Method of manufacturing semiconductor device

1. A method of manufacturing a semiconductor device, comprising:

(a) forming a trench portion in a main surface of a semiconductor substrate;

(b) forming a first insulating film having a silicon oxide film in the trench portion and over the main surface of the semiconductor substrate;

(c) after (b), forming a second insulating film having a silicon oxide film over the first insulating film in the trench portion and over the main surface of the semiconductor substrate;

(d) after (c), forming a third insulating film having a silicon oxide film over the second insulating film in the trench portion and over the main surface of the semiconductor substrate;

(e) polishing a surface of the third insulating film by chemical-mechanical polishing (CMP);

(f) after (e), forming a fourth insulating film having a silicon oxide film over the third insulating film; and

(o) prior to (a), forming a transistor over the main surface of the semiconductor substrate,

wherein in (b), the first insulating film covers the transistor,

wherein in (b), the first insulating film covers a first side surface of the trench portion,

wherein in (c), the second insulating film covers the first side surface of the trench portion via the first insulating film,

wherein in (d), the third insulating film closes the trench portion while leaving a space in the trench portion,

wherein after (e), a top end of the space is covered with the third insulating film,

wherein in (c), the second insulating film is formed on the first insulating film covering the transistor,

after (e), the transistor remains covered by portions of the first and second insulating film, and

after (f), a portion of the fourth insulating film is in direct contact with said portion of the second insulating film.

2. The method of manufacturing a semiconductor device according to claim 1 ,

wherein, after (c), the second insulating film forms an opening to the trench portion adjacent to the main surface that is narrower than a width between facing surfaces of the second insulating film within the trench portion and remote from said opening, and

wherein the second insulating film does not close the trench portion.

3. The method of manufacturing a semiconductor device according to claim 1 ,

wherein in (b), the first insulating film is formed by chemical vapor deposition.

4. The method of manufacturing a semiconductor device according to claim 1 ,

wherein in (c), the second insulating film is formed by plasma chemical vapor deposition.

5. The method of manufacturing a semiconductor device according to claim 1 ,

wherein in (d), the third insulating film is formed by chemical vapor deposition.

6. The method of manufacturing semiconductor device according to claim 1 ,

wherein in (c), the second insulating film is formed by plasma chemical vapor deposition using a gas containing a tetraethoxysilane gas.

7. The method of manufacturing a semiconductor device according to claim 1 ,

wherein in (c), the second insulating film is formed by plasma chemical vapor deposition using a gas containing a silane gas.

8. The method of manufacturing a semiconductor device according to claim 1 ,

wherein in (f), the fourth insulating film is formed by plasma chemical vapor deposition using a gas containing a tetraethoxysilane gas.

9. The method of manufacturing a semiconductor device according to claim 1 ,

wherein in (f), the fourth insulating film is formed by plasma chemical vapor deposition using a gas containing a silane gas.

10. The method of manufacturing a semiconductor device according to claim 1 ,

wherein in (a), the trench portion surrounds the transistor in plan view.

11. The method of manufacturing a semiconductor device according to claim 1 ,

wherein a contact hole connecting to a source or drain of the transistor penetrates the first insulating film.

12. The method of manufacturing a semiconductor device according to claim 1 ,

wherein an upper surface of the second insulating film is exposed from the third insulating film by the polishing in (e).

13. The method of manufacturing a semiconductor device according to claim 1 ,

wherein, in (f), the fourth insulating film is formed to be in direct contact with upper surfaces of the second and third insulating films.

14. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

prior to (a), forming an element isolation region, which comprises silicon oxide, in the main surface of the semiconductor substrate,

wherein in (a), the trench portion is formed to extend through the element isolation region into the semiconductor substrate, and

wherein, in cross-sectional view, said top end of the space is between the main surface of the semiconductor substrate and a bottom surface of the element isolation region through which the trench portion extends.

15. The method of manufacturing a semiconductor device according to claim 1 ,

wherein, in the respective forming thereof, the first and third insulating films have better fluidity than the second insulating film.

16. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the first and third insulating films are formed by a first deposition technique, and

the second and fourth insulating films are formed by a second deposition technique different from the first deposition technique.

17. The method of manufacturing a semiconductor device according to claim 16 ,

wherein the first deposition technique comprises chemical vapor deposition, and

the second deposition technique comprises plasma-enhanced chemical vapor deposition.

18. The method of manufacturing a semiconductor device according to claim 1 , wherein after the polishing of (e), portions of the first and second insulating films remain over the main surface of the semiconductor substrate.