IP Library Granted Patent US 9,921,593
Granted Patent B2
US 9,921,593 · App. 15/374,983 · Granted Mar 20, 2018

Wideband low dropout voltage regulator with power supply rejection boost

Inventors: James Lawrence Gorecki (Hillsboro, OR); Han-Yuan Tan (Santa Clara, CA)
Assignee: INPHI CORPORATION
G05F1/565G05F1/575
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Quick Facts
Patent No.
US 9,921,593
App. No.
15/374,983
Granted
Mar 20, 2018
Kind
B2
Abstract

The present disclosure provides a detailed description of techniques for implementing a wideband low dropout voltage regulator with power supply rejection boost. More specifically, some embodiments of the present disclosure are directed to a voltage regulator comprising a voltage regulator core powered by a supply voltage and providing a regulated voltage output, and a power supply feed forward injection module delivering an injection signal to the voltage regulator core to effect a power supply rejection of the supply voltage variation from the regulated voltage. In one or more embodiments, the injection signal is determined from the supply voltage variation and a gain factor that is based on various design attributes of the output stage of the voltage regulator core. In one or more embodiments, the power supply feed forward injection module comprises a supply voltage sense circuit, a low pass filter, and one or more selectable transconductance amplifiers.

Claims (35)

1. A communication system comprising:

a data communications receiver having a power supply node;

a voltage regulator core coupled to the power supply node, the voltage regulator core having an output node, and an injection node; and

a power supply feed forward injection module coupled to the power supply node and the injection node, the power supply feed forward injection module comprising,

a sense circuit;

a low pass filter; and

one or more transconductance amplifiers,

wherein the sense circuit, the low pass filter, and the one or more transconductance amplifiers serve to generate an injection signal at the injection node to reject supply voltage variations.

2. The communication system of claim 1 wherein the data communications receiver implements Gigabit Ethernet.

3. The voltage regulator core of claim 1 , wherein the sense circuit provides a scaled version of the supply voltage.

4. The communication system of claim 1 , wherein at least one of the one or more transconductance amplifiers comprises a control signal, and wherein a state of the control signal determines at least in part, a respective portion of an injection current provided by the at least one of the one or more transconductance amplifiers.

5. The communication system of claim 4 wherein at least two of the transconductance amplifiers are coupled in parallel.

6. The voltage regulator core of claim 3 , wherein the scaled version of the supply voltage provided by the sense circuit is electrically connected to the low pass filter.

7. The communication system of claim 1 , wherein at least one of the one or more transconductance amplifiers comprises a bias device, wherein the bias device determines, at least in part, a respective portion of an injection current provided by the at least one of the one or more transconductance amplifiers.

8. A voltage regulator having a supply voltage, a power supply node to produce a regulated voltage at an output node, and an injection node for controlling power supply voltage variations, the voltage regulator comprising:

a voltage regulator core coupled to the power supply node, the output node, and the injection node; and

a power supply feed forward injection module coupled to the power supply node and the injection node, the power supply feed forward injection module comprising,

a sense circuit;

a low pass filter; and

one or more transconductance amplifiers,

wherein the sense circuit, the low pass filter, and the one or more transconductance amplifiers serve to generate an injection signal at the injection node to reject supply voltage variations.

9. The voltage regulator of claim 8 , wherein the sense circuit provides a scaled version of the supply voltage.

10. The voltage regulator of claim 8 , wherein at least two of the transconductance amplifiers are coupled in parallel.

11. The voltage regulator of claim 8 , wherein at least one of the one or more transconductance amplifiers comprises a control signal, and wherein a state of the control signal determines at least in part, a respective portion of an injection current provided by the at least one of the one or more transconductance amplifiers.

12. The voltage regulator of claim 8 , wherein at least one of the one or more transconductance amplifiers comprises a bias device, wherein the bias device determines, at least in part, a respective portion of an injection current provided by the at least one of the one or more transconductance amplifiers.

13. The voltage regulator of claim 12 , wherein the voltage regulator core further comprises an output stage comprising an input device and an output device, wherein the input device is coupled to the power supply node and the injection node, and wherein the output device is coupled to the power supply node, the injection node, and the output node, and wherein the input device and the output device have a respective plurality of device design attributes.

14. The voltage regulator of claim 13 , wherein an injection current is determined from a supply voltage variation and a gain factor.

15. The voltage regulator of claim 14 , wherein the gain factor is determined from at least one of the respective plurality of device design attributes.

16. The voltage regulator of claim 14 , wherein the input device comprises an N-type MOSFET transistor having an input transconductance, and wherein the output device comprises a P-type MOSFET transistor having an output transconductance and an output drain transconductance, wherein the gain factor is determined from at least one of the input transconductance, the output transconductance, and the output drain transconductance.

17. The voltage regulator of claim 8 , wherein at least one of the transconductance amplifiers is disabled using a control signal.

18. The voltage regulator of claim 8 ,

wherein the sense circuit is coupled to the power supply node, the low pass filter, and the one or more transconductance amplifiers, and

wherein the low pass filter is coupled to the sense circuit and the one or more transconductance amplifiers.

19. The voltage regulator of claim 8 , wherein the sense circuit senses the supply voltage variation to provide a scaled supply voltage variation to the low pass filter and the one or more transconductance amplifiers.

20. The voltage regulator of claim 19 , wherein the low pass filter is coupled to the sense circuit and the one or more transconductance amplifiers to produce a filtered supply voltage variation.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2017
From: GORECKI, JAMES LAWRENCE; TAN, HAN-YUAN
To: INPHI CORPORATION
Reel/Frame 043285/0277 →
Continuity (2)
Continuation 14642647 · Mar 9, 2015
Related Publication 20170126329A1 · May 4, 2017