IP Library Granted Patent US 9,754,934
Granted Patent B2
US 9,754,934 · App. 15/383,214 · Granted Sep 5, 2017

Method of operating an integrated switchable capacitive device

Inventors: Pascal Fornara (Pourrières, FR); Christian Rivero (Rousset, FR)
Assignee: STMICROELECTRONICS (ROUSSET) SAS
H01L27/0629H01G5/011H01G5/16H01L21/7687H01L23/528H01L23/5223H01L28/60
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Quick Facts
Patent No.
US 9,754,934
App. No.
15/383,214
Granted
Sep 5, 2017
Kind
B2
Abstract

A variable capacitor includes a fixed main capacitor electrode disposed in a first metal layer overlying a substrate, a second main capacitor electrode spaced from the fixed main capacitor electrode, and a movable capacitor electrode disposed in the first metal layer adjacent the fixed main capacitor electrode. The movable capacitor electrode can be caused to be in a first position ohmically electrically connected to the fixed main capacitor electrode such that the variable capacitor has a first capacitance value or in a second position spaced from the fixed main capacitor electrode such that the variable capacitor has a second capacitance value.

Claims (33)

1. An integrated circuit, comprising:

an accommodation; and

a variable capacitor disposed, at least partially, within the accommodation, the variable capacitor, comprising:

a first capacitor electrode disposed in a first interconnect layer overlying a substrate;

a second capacitor electrode disposed in a second interconnect layer overlying the first capacitor electrode; and

a movable capacitor electrode coupled to a wall defining the accommodation, the movable capacitor electrode being adjacent to the first capacitor electrode, the movable capacitor electrode being switchable between a first configuration and a second configuration, wherein the movable capacitor electrode is ohmically coupled to the first capacitor electrode in the first configuration and capacitively coupled to the first capacitor electrode in the second configuration.

2. The integrated circuit of claim 1 , wherein the movable capacitor electrode is rigidly coupled to the wall of the accommodation.

3. The integrated circuit of claim 1 , wherein the movable capacitor electrode is pivotally coupled to the wall of the accommodation.

4. The integrated circuit of claim 3 , further comprising a first pin rigidly attached to a first wall of the accommodation and a second pin rigidly attached to a second wall of the accommodation, wherein the first pin and the second pin define a pivot point, and wherein the movable capacitor electrode is movable about the pivot point.

5. The integrated circuit of claim 1 , further comprising an actuation element configured to switch the movable capacitor electrode between the first configuration and the second configuration.

6. The integrated circuit of claim 5 , wherein the actuation element is disposed in the first interconnect layer.

7. The integrated circuit of claim 6 , wherein the actuation element is disposed, at least partially, within the accommodation.

8. The integrated circuit of claim 1 , wherein the movable capacitor electrode physically contacts the first capacitor electrode in the first configuration, and wherein the movable capacitor electrode is spaced apart from the first capacitor electrode in the second configuration.

9. An integrated circuit, comprising:

a movable electrode disposed in a first metal layer;

a fixed capacitor having a first plate disposed in the first metal layer and a second plate disposed in a second metal layer overlying the first metal layer, wherein a first sidewall of the movable electrode is directed toward and spaced apart from the first plate; and

an actuator, wherein a second sidewall of the movable electrode is directed toward and spaced apart from the actuator, wherein the movable electrode is configured to switch between a first position and a second position in response to an electrostatic field generated by the actuator.

10. The integrated circuit of claim 9 , wherein the movable electrode is ohmically coupled to the first plate in the first position and capacitively coupled to the first plate in the second position.

11. The integrated circuit of claim 9 , further comprising:

a first conductive element spaced apart from the actuator and the second sidewall of the movable electrode; and

a second conductive element coupling the first plate of the fixed capacitor to the first conductive element.

12. The integrated circuit of claim 11 , wherein the movable electrode physically contacts the first conductive element when the movable electrode is in the first position, and wherein the movable electrode is spaced apart from the first conductive element and the first plate when the movable electrode is in the second position.

13. The integrated circuit of claim 12 , wherein the movable electrode is configured to move toward and physically contact the first conductive element in response to the electrostatic field generated by the actuator.

14. The integrated circuit of claim 9 , further comprising a voltage generator electrically coupled to the actuator via a metallization line.

15. The integrated circuit of claim 14 , further comprising a cavity, wherein the movable electrode, the fixed capacitor, and the actuator are disposed at least partially within the cavity, wherein the voltage generator is disposed outside the cavity, and wherein the metallization line passes through a wall defining the cavity.

16. The integrated circuit of claim 15 , wherein the wall is set at a ground potential.

17. An integrated circuit, comprising:

a switchable capacitor comprising:

a first capacitor comprising a first electrode and a second electrode overlying the first electrode; and

a third electrode adjacent to the first electrode, wherein the third electrode is configured to be resistively connected to the first electrode in a first configuration such that the switchable capacitor has a first capacitance value, and wherein the third electrode is configured to be capacitively connected to the first electrode in a second configuration such that the switchable capacitor has a second capacitance value different from the first capacitance value.

18. The integrated circuit of claim 17 , further comprising a dielectric layer interposed between the first electrode and the second electrode.

19. The integrated circuit of claim 17 , further comprising a cavity disposed within an interconnect region comprising a plurality of metallization levels separated by insulating regions, wherein the switchable capacitor is disposed at least partially within the cavity.

20. The integrated circuit of claim 17 , wherein the third electrode is switchable between the first configuration and the second configuration in response to an electrostatic field.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2023
From: STMICROELECTRONICS (ROUSSET) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 063282/0118 →
Priority Claims (1)
FR 13 53945 · Apr 30, 2013 · national
Continuity (4)
Continuation 15077702 · Mar 22, 2016
Division 14957544 · Dec 2, 2015
Division 14264227 · Apr 29, 2014
Related Publication 20170103980A1 · Apr 13, 2017