FDSOI LDMOS semiconductor device
View Patent ↗Semiconductor devices are provided that use both silicon on insulator region and bulk region of a fully depleted silicon on insulator (FDSOI) device. For example, a semiconductor device includes a drain region that is disposed above a first type well and a first drain extension region that is disposed above the first type well and laterally spaced apart from the drain region. The semiconductor device further includes a second drain extension region that is disposed above the first type well and is laterally spaced apart from the drain region and the first drain extension region. The semiconductor device further includes a source region disposed above a second type well and laterally spaced apart from the second drain extension.
1. A fully depleted silicon-on-insulator (FDSOI) semiconductor device, comprising:
a drain region disposed above a first type well;
a first drain extension region disposed above the first type well and laterally spaced apart from the drain region;
a second drain extension region disposed above the first type well and laterally spaced apart from the drain region and the first drain extension region; and
a source region disposed above a second type well and laterally spaced apart from the second drain extension region,
wherein the drain region and the first drain extension region are disposed above and in contact with a bulk region of the FDSOI semiconductor device, and
wherein the source region and the second drain extension region are disposed above and in contact with a silicon-on-insulator (SOI) region of the FDSOI semiconductor device.
2. The FDSOI semiconductor device of claim 1 , further comprising:
a first contact disposed above and in contact with the first drain extension region; and
a second contact disposed above and in contact with the second drain extension region.
3. The FDSOI semiconductor device of claim 2 , further comprising:
a metal disposed above and in contact with the first and second contacts.
4. The FDSOI semiconductor device of claim 1 , further comprising:
a single contact disposed above and in contact with both the first and second drain extension regions.
5. The FDSOI semiconductor device of claim 1 , wherein the first and second type wells are same.
6. The FDSOI semiconductor device of claim 1 , wherein:
the first type well comprises a first portion, a second portion, and a third portion,
the drain region is disposed above and in contact with the first portion of the first type well,
the first drain extension region is disposed above and in contact with the second portion of the first type well, and
the second drain extension region is disposed above the third portion of the first type well.
7. The FDSOI semiconductor device of claim 6 , wherein the first portion, the second portion, and the third portion of the first type well are separated by corresponding shallow trench isolation (STI) regions.
8. The semiconductor device of claim 1 , wherein the source region and the drain region are doped using in-situ doping techniques.
9. The FDSOI semiconductor device of claim 1 , wherein the second drain extension region is disposed above both the first type well and the second type well.
10. A semiconductor device, comprising:
a drain region disposed above a first type well;
a first drain extension region disposed above the first type well and laterally spaced apart from the drain region;
a second drain extension region disposed above the first type well and laterally spaced apart from the drain region and the first drain extension region;
a source region disposed above a second type well and laterally spaced apart from the second drain extension; and
a buried oxide (BOX) layer disposed above and in contact with the first type well and the second type well, and laterally spaced apart from the drain region and the first drain extension region,
wherein the second drain extension region and the source region are disposed above and in contact with the BOX layer.
11. The semiconductor device of claim 10 , further comprising:
a channel layer disposed above the BOX layer and laterally disposed in between the source region and the second drain extension region.
12. The semiconductor device of claim 11 , further comprising:
a gate structure disposed above and in contact with the channel layer; and
a spacer layer comprising a first portion disposed above the source region and a second portion disposed above the second drain extension region.
13. The semiconductor device of claim 12 , wherein the gate structure comprises:
a gate dielectric disposed above and in contact with the channel layer;
a work function metal deposited over and in contact with the gate dielectric; and
a gate metal disposed over and in contact with the work function metal.
14. A fully depleted silicon-on-insulator (FDSOI) semiconductor device, comprising:
an extended drain region comprising:
a drain region disposed above a first type well;
a first drain extension region disposed above the first type well; and
a second drain extension region disposed above the first type well,
wherein the drain region, the first drain extension region, and the second drain extension region are laterally spaced apart from each other, and
wherein the first drain extension region is electrically coupled with the second drain extension region;
a source region disposed above a second type well and laterally spaced apart from the extended drain region; and
a channel layer disposed above the second type well and disposed laterally between the source region and the extended drain region,
wherein the drain region and the first drain extension region are disposed above and in contact with a bulk region of the FDSOI semiconductor device, and
wherein the source region, the channel layer, and the second drain extension region are disposed above and in contact with a silicon-on-insulator (SOI) region of the FDSOI semiconductor device.
15. The FDSOI semiconductor device of claim 14 , further comprising:
a first contact disposed above and in contact with the first drain extension region; and
a second contact disposed above and in contact with the second drain extension region.
16. The FDSOI semiconductor device of claim 15 , further comprising:
a metal disposed above and in contact with the first and second contacts to electrically couple the first drain extension region to the second drain extension region.
17. The FDSOI semiconductor device of claim 14 , further comprising;
a single contact disposed above and in contact with both the first and second drain extension regions to electrically couple the first drain extension region to the second drain extension region.
18. The FDSOI semiconductor device of claim 14 , further comprising:
a buried oxide (BOX) layer disposed above and in contact with the first type well and the second type well, and laterally spaced apart from the drain region and the first drain extension region,
wherein the second drain extension region and the source region are disposed above and in contact with the BOX layer.
19. The FDSOI semiconductor device of claim 14 , further comprising:
a gate structure disposed above and in contact with the channel layer; and
a spacer layer comprising a first portion disposed above the source region and a second portion disposed above the second drain extension region.
20. The FDSOI semiconductor device of claim 14 , wherein the second drain extension region is disposed above both the first type well and the second type well.