IP Library Granted Patent US 10,103,618
Granted Patent B2
US 10,103,618 · App. 15/392,964 · Granted Oct 16, 2018

Power factor correction circuit with calculated duty compensation and driving method thereof

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Quick Facts
Patent No.
US 10,103,618
App. No.
15/392,964
Granted
Oct 16, 2018
Kind
B2
Abstract

Provided is a power factor correction circuit including an inductor having one end to which an input voltage is applied; a power switch connected between another end of the inductor and the ground, and configured to control an output of the power factor correction circuit; and a power factor correction controller configured to calculate a duty of the power switch on the basis of an output detection voltage corresponding to the output and an inductor current flowing through the inductor, calculate conduction-period information regarding a conduction period in which the inductor current flows in one switching cycle of the power switch, and compensate the calculated duty on the basis of the conduction-period information.

Claims (39)

1. A power factor correction circuit comprising:

an inductor having a first end to which an input voltage is applied;

a power switch connected between a second end of the inductor and a ground, the power switch being configured to control an output of the power factor correction circuit; and

a power factor correction controller configured to calculate a duty of the power switch on the basis of an output detection voltage corresponding to the output of the power factor correction circuit and an inductor current flowing through the inductor, calculate conduction-period information regarding a conduction period in which the inductor current flows in one switching cycle of the power switch, and compensate the calculated duty of the power switch on the basis of the conduction-period information,

wherein the power factor correction controller detects a zero-cross time of the inductor current and calculates the conduction-period information by sampling a reference signal synchronized with a switching frequency of the power switch at the detected zero-cross time, holding the sampled reference signal to generate a conduction detection voltage, and converting the conduction period into voltage information on the basis of the conduction detection voltage.

2. The power factor correction circuit of claim 1 , wherein the power factor correction controller generates an output error voltage on the basis of a difference between the output detection voltage and a predetermined output reference voltage, calculates line-current information according to an average inductor current by low-pass filtering a sensing voltage corresponding to the inductor current, and calculates the duty of the power switch on the basis of the output error voltage and the line-current information.

3. The power factor correction circuit of claim 1 , wherein the reference signal comprises a sawtooth wave that is decreasing with a predetermined slope in one switching cycle of the power switch, and

the power factor correction controller determines a voltage of the conduction-period information on the basis of a voltage obtained by subtracting the conduction detection voltage from a predetermined reference voltage.

4. The power factor correction circuit of claim 1 , further comprising an auxiliary wire coupled to the inductor, wherein the power factor correction controller detects the zero-cross time using voltages of opposite ends of the auxiliary wire.

5. The power factor correction circuit of claim 1 , wherein the power factor correction controller generates a duty control signal by multiplying the calculated duty of the power switch by the conduction-period information.

6. The power factor correction circuit of claim 2 , wherein the power factor correction controller calculates the duty of the power switch by dividing the line-current information by the output error voltage and subtracting a voltage corresponding to a result of dividing the line-current information by the output error voltage from a predetermined reference duty voltage.

7. The power factor correction circuit of claim 5 , wherein the power factor correction controller turns off the power switch according to a result of comparing the duty control signal with a predetermined reference signal synchronized with the switching frequency of the power switch.

8. The power factor correction circuit of claim 7 , wherein the power factor correction controller generates a clock signal for determining the switching frequency of the power switch, and turns off the power switch in synchronization with the clock signal.

9. A method of driving a power factor correction circuit including an inductor to which an input voltage is applied and a power switch connected to the inductor, the method comprising:

generating an output error voltage corresponding to an output of the power factor correction circuit;

generating line-current information based on an inductor current flowing through the inductor;

calculating conduction-period information regarding a conduction period in which the inductor current flows in one switching cycle of the power switch;

calculating a duty of the power switch according to the output error voltage and the line-current information; and

compensating the calculated duty of the power switch according to the conduction-period information,

wherein the calculating of the conduction-period information comprises:

detecting a zero-cross time of the inductor current;

sampling a reference signal synchronized with a switching frequency of the power switch at the zero-cross time;

generating a conduction detection voltage by holding the sampled reference signal; and

determining a voltage of the conduction-period information on the basis of the conduction detection voltage.

10. The method of claim 9 , wherein the generating of the output error voltage comprises:

generating an output detection voltage following the output of the power factor correction circuit; and

amplifying a difference between the output detection voltage and a predetermined output reference voltage.

11. The method of claim 9 , wherein the generating of the line-current information comprises low-pass filtering a sensing voltage corresponding to the inductor current.

12. The method of claim 9 , wherein the reference signal comprises a sawtooth wave that is decreasing with a predetermined slope in one switching cycle of the power switch, and

the determining of the voltage of the conduction-period information comprises determining the voltage of the conduction-period information based on a voltage obtained by subtracting the conduction detection voltage from a predetermined reference voltage.

13. The method of claim 9 , wherein the calculating of the duty comprises:

dividing the line-current information by the output error voltage; and

calculating the duty of the power switch by subtracting a voltage corresponding to a result of dividing the line-current information by the output error voltage from a predetermined reference duty voltage.

14. The method of claim 9 , wherein the compensating of the calculated duty comprises multiplying the calculated duty by the conduction-period information.

15. A power factor correction circuit comprising:

an inductor having a first end to which an input voltage is applied;

a power switch connected between a second end of the inductor and a ground, the power switch being configured to control an output of the power factor correction circuit; and

a power factor correction controller configured to calculate a duty of the power switch on the basis of an output detection voltage corresponding to the output of the power factor correction circuit and an inductor current flowing through the inductor, calculate conduction-period information regarding a conduction period in which the inductor current flows in one switching cycle of the power switch, and compensate the calculated duty of the power switch on the basis of the conduction-period information,

wherein the power factor correction controller generates an output error voltage on the basis of a difference between the output detection voltage and a predetermined output reference voltage, calculates line-current information according to an average inductor current by low-pass filtering a sensing voltage corresponding to the inductor current, and calculates the duty of the power switch by dividing the line-current information by the output error voltage and subtracting a voltage corresponding to a result of dividing the line-current information by the output error voltage from a predetermined reference duty voltage.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 04481, FRAME 0541 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0459 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 19, 2017
From: KIM, JINTAE; CHOI, HANG-SEOK; MOON, SANGCHEOL
To: FAIRCHILD KOREA SEMICONDUCTOR LTD
Reel/Frame 043041/0463 →