IP Library Granted Patent US 10,326,463
Granted Patent B2
US 10,326,463 · App. 15/395,586 · Granted Jun 18, 2019

Method and system for charge compensation for switched capacitor circuits

Inventors: Hao Liu (Carlsbad, CA); Yongjian Tang (Carlsbad, CA)
Assignee: Maxlinear, Inc.
H03M1/0678H03H19/004H03M1/0604H03M1/12H03M1/66
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Quick Facts
Patent No.
US 10,326,463
App. No.
15/395,586
Granted
Jun 18, 2019
Kind
B2
Abstract

Methods and systems for charge compensation for switched-capacitor circuits may comprise, in an electronics device comprising a first voltage source, a switched capacitor load, and a switched capacitor compensation circuit: switching a capacitor in the switched capacitor load from a first voltage to a second voltage; providing a charge to the switched capacitor load from the switched capacitor compensation circuit without requiring added charge from the first voltage source. A reference voltage may be generated utilizing the first voltage source. A replica reference voltage for the switched capacitor compensation circuit may be generated utilizing a second voltage source. The replica reference voltage may be equal to the reference voltage. The replica reference voltage may be equal to a supply voltage, VDD, for circuitry in the electronics device. Capacitors may couple outputs of the first and second voltage sources to ground.

Claims (61)

1. A method for communication, the method comprising:

in an electronics device comprising a first voltage source, a capacitive load, and a compensation circuit, where an output of the first voltage source and an output of the compensation circuit are both coupled to a first node through which current is coupled to the capacitive load:

switching a capacitor in the capacitive load from a first voltage to a second voltage; and

providing charge to the capacitive load from the compensation circuit via the first node without requiring added charge from the first voltage source, wherein a first capacitor couples an output of the first voltage source to ground.

2. The method according to claim 1 , wherein the first voltage source generates a reference voltage for the capacitive load.

3. The method according to claim 2 , comprising generating a replica reference voltage for the compensation circuit utilizing a second voltage source.

4. The method according to claim 3 , wherein the replica reference voltage is equal to the reference voltage.

5. The method according to claim 3 , wherein the replica reference voltage is equal to a supply voltage, VDD, for circuitry in the electronics device.

6. The method according to claim 1 , comprising configuring capacitors in the capacitive load and the compensation circuit utilizing switch control logic that receives an output signal from a comparator at an output of the capacitive load.

7. The method according to claim 1 , wherein the capacitive load comprises a digital to analog converter (DAC).

8. The method according to claim 1 , wherein the capacitive load comprises a switched capacitor filter.

9. A system for processing signals, the system comprising:

one or more circuits comprising a first voltage source, a capacitive load, and a compensation circuit, where an output of the first voltage source and an output of the compensation circuit are both coupled to a first node through which current is coupled to the capacitive load, said one or more circuits being operable to:

switch a capacitor in the capacitive load from a first voltage to a second voltage; and

provide charge to the capacitive load from the compensation circuit via the first node without requiring added charge from the first voltage source, wherein a first capacitor couples an output of the first voltage source to ground.

10. The system according to claim 9 , wherein the first voltage source generates a reference voltage for the capacitive load.

11. The system according to claim 10 , wherein said one or more circuits are operable to generate a replica reference voltage for the compensation circuit utilizing a second voltage source.

12. The system according to claim 11 , wherein the replica reference voltage is equal to the reference voltage.

13. The system according to claim 11 , wherein the replica reference voltage is equal to a supply voltage, VDD, for circuitry in the electronics device.

14. The system according to claim 9 , wherein said one or more circuits are operable to configure capacitors in the capacitive load and the compensation circuit utilizing switch control logic that receives an output signal from a comparator at an output of the capacitive load.

15. The system according to claim 9 , wherein the capacitive load comprises a digital to analog converter (DAC).

16. A system for processing signals, the system comprising:

one or more circuits in an analog to digital converter (ADC) comprising a first voltage source, a capacitive load, a comparator, and a compensation circuit, where an output of the first voltage source and an output of the compensation circuit are both coupled to a first node through which current is coupled to the capacitive load, said one or more circuits being operable to:

switch a capacitor in the capacitive load from a first voltage to a second voltage based on an output voltage of the comparator; and

provide charge to the capacitive load from the compensation circuit via the first node equal to the charge needed by the switched capacitor in the capacitive load without requiring added charge from the first voltage source, wherein the capacitive load comprises a digital to analog converter (DAC).

17. A method for communication, the method comprising:

in an electronics device comprising a first voltage source, a capacitive load, and a compensation circuit, where an output of the first voltage source and an output of the compensation circuit are both coupled to a first node through which current is coupled to the capacitive load:

switching a capacitor in the capacitive load from a first voltage to a second voltage; and

providing charge to the capacitive load from the compensation circuit via the first node without requiring added charge from the first voltage source, wherein one or more capacitors in the capacitive load and the compensation circuit are configured utilizing switch control logic that receives an output signal from a comparator at an output of the capacitive load.

18. The method according to claim 17 , wherein the first voltage source generates a reference voltage for the capacitive load.

19. The method according to claim 18 , comprising generating a replica reference voltage for the compensation circuit utilizing a second voltage source.

20. The method according to claim 19 , wherein the replica reference voltage is equal to the reference voltage.

21. The method according to claim 19 , wherein the replica reference voltage is equal to a supply voltage, VDD, for circuitry in the electronics device.

22. The method according to claim 17 , wherein the capacitive load comprises a digital to analog converter (DAC).

23. The method according to claim 17 , wherein the capacitive load comprises a switched capacitor filter.

24. A method for communication, the method comprising:

in an electronics device comprising a first voltage source, a capacitive load, and a compensation circuit, where an output of the first voltage source and an output of the compensation circuit are both coupled to a first node through which current is coupled to the capacitive load:

switching a capacitor in the capacitive load from a first voltage to a second voltage; and

providing charge to the capacitive load from the compensation circuit via the first node without requiring added charge from the first voltage source, wherein the capacitive load comprises a digital to analog converter (DAC).

25. The method according to claim 24 , wherein the first voltage source generates a reference voltage for the capacitive load.

26. The method according to claim 25 , comprising generating a replica reference voltage for the compensation circuit utilizing a second voltage source.

27. The method according to claim 26 , wherein the replica reference voltage is equal to the reference voltage.

28. The method according to claim 26 , wherein the replica reference voltage is equal to a supply voltage, VDD, for circuitry in the electronics device.

29. A system for processing signals, the system comprising:

one or more circuits comprising a first voltage source, a capacitive load, and a compensation circuit, where an output of the first voltage source and an output of the compensation circuit are both coupled to a first node through which current is coupled to the capacitive load, said one or more circuits being operable to:

switch a capacitor in the capacitive load from a first voltage to a second voltage; and

provide charge to the capacitive load from the compensation circuit via the first node without requiring added charge from the first voltage source, wherein said one or more circuits are operable to configure capacitors in the capacitive load and the compensation circuit utilizing switch control logic that receives an output signal from a comparator at an output of the capacitive load.

30. The system according to claim 29 , wherein the first voltage source generates a reference voltage for the capacitive load.

31. The system according to claim 30 , wherein said one or more circuits are operable to generate a replica reference voltage for the compensation circuit utilizing a second voltage source.

32. The system according to claim 31 , wherein the replica reference voltage is equal to the reference voltage.

33. The system according to claim 31 , wherein the replica reference voltage is equal to a supply voltage, VDD, for circuitry in the electronics device.

34. The system according to claim 29 , wherein said one or more circuits are operable to configure one or more capacitors in the capacitive load and the compensation circuit utilizing switch control logic that receives an output signal from a comparator at an output of the capacitive load.

35. The system according to claim 29 , wherein the capacitive load comprises a digital to analog converter (DAC).

36. A system for processing signals, the system comprising:

one or more circuits comprising a first voltage source, a capacitive load, and a compensation circuit, where an output of the first voltage source and an output of the compensation circuit are both coupled to a first node through which current is coupled to the capacitive load, said one or more circuits being operable to:

switch a capacitor in the capacitive load from a first voltage to a second voltage; and

provide charge to the capacitive load from the compensation circuit via the first node without requiring added charge from the first voltage source, wherein the capacitive load comprises a digital to analog converter (DAC).

37. The system according to claim 36 , wherein the first voltage source generates a reference voltage for the capacitive load.

38. The system according to claim 37 , wherein said one or more circuits are operable to generate a replica reference voltage for the switched capacitor compensation circuit utilizing a second voltage source.

39. The system according to claim 38 , wherein the replica reference voltage is equal to the reference voltage.

40. The system according to claim 38 , wherein the replica reference voltage is equal to a supply voltage, VDD, for circuitry in the electronics device.

Assignments (5)
SECURITY AGREEMENT Recorded Jul 9, 2021
From: MAXLINEAR, INC.; MAXLINEAR COMMUNICATIONS, LLC; EXAR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 056816/0089 →
RELEASE OF SECURITY INTEREST Recorded Jun 23, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; EXAR CORPORATION; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 056656/0204 →
SUCCESSION OF AGENCY (REEL 042453 / FRAME 0001) Recorded Jul 1, 2020
From: JPMORGAN CHASE BANK, N.A.
To: MUFG UNION BANK, N.A.
Reel/Frame 053115/0842 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2019
From: TANG, YONGJIAN; LIU, HAO
To: MAXLINEAR, INC.
Reel/Frame 049072/0711 →
SECURITY AGREEMENT Recorded May 12, 2017
From: MAXLINEAR, INC.; ENTROPIC COMMUNICATIONS, LLC (F/K/A ENTROPIC COMMUNICATIONS, INC.); EXAR CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042453/0001 →
Continuity (3)
Continuation 14601058 · Jan 20, 2015
Provisional Application 61929276 · Jan 20, 2014
Related Publication 20170111052A1 · Apr 20, 2017