Data center management via out-of-band, low-pin count, external access to local motherboard monitoring and control
Provided is an external secondary computing device configured to monitor or control a rack-mounted computing device independently of whether the rack-mounted computing device is operating or is turned off via a low-pin-count motherboard bus independently of a baseboard management controller.
1. A secondary computing device configured to monitor or control a rack-mounted computing device independently of whether the rack-mounted computing device is operating or is turned off, the secondary computing device comprising:
a low-bandwidth bus connector configured to connect to a low-bandwidth management bus on a motherboard of a rack-mounted computing device, wherein the low-bandwidth bus connector is a removable connector and configured to:
be held in place on the motherboard, at least in part, by a resilient member, and
connect to the low-bandwidth management bus via electrical contact with five or fewer conductors, a first conductor of the five or fewer conductors being a clock-signal conductor, a second conductor of the five or fewer conductors being a data conductor, the clock-signal conductor being configured to receive a clock-signal operating at less than 10 MHz;
a bus-bar connector configured to couple to a bus bar extending past, and providing direct current power to, a plurality of rack-mounted computing devices;
a filter configured to separate a data signal from direct current power conducted by the bus bar; and
an off-motherboard microcontroller electrically coupled to the low-bandwidth bus connector, the microcontroller comprising one or more processors and memory storing instructions that, when executed by at least some of the processors, effectuate operations comprising:
receiving, with an off-motherboard network interface, via an out-of-band network, a first command from a computing device configured to monitor or control a plurality of rack-mounted computing devices;
sending a second command based on the first command via the connector to an electronic device coupled to the low-bandwidth management bus on the motherboard;
receiving a response to the second command via the low-bandwidth management bus from the electronic device; and
transmitting data based on the response, with the off-motherboard network interface, via the out-of-band network, to the computing device configured to monitor or control a plurality of rack-mounted computing devices.
2. The secondary computing device of claim 1 , wherein:
the low-bandwidth management bus is a System Management Bus (SMBus).
3. The secondary computing device of claim 1 , comprising:
the off-motherboard network interface communicatively coupled to the one or more processors.
4. The secondary computing device of claim 3 , wherein:
the off-motherboard network interface comprises an Ethernet network interface.
5. The secondary computing device of claim 3 , wherein:
the off-motherboard network interface comprises a powerline communication modem.
6. The secondary computing device of claim 1 , wherein the operations comprise:
adjusting a fan speed of a fan controlled via the motherboard by disengaging control of the fan by the rack-mounted computing device and sending a pulse-width modulated signal having a duty cycle corresponding to a target fan speed.
7. The secondary computing device of claim 1 , wherein the operations comprise:
reading a value from a motherboard temperature sensor indicative of a temperature of a component on the motherboard.
8. The secondary computing device of claim 1 , wherein the operations comprise:
reading a value from a motherboard voltage sensor indicative of a voltage of a conductive trace of the motherboard.
9. The secondary computing device of claim 1 , wherein the operations comprise:
turning off the rack-mounted computing device; and
turning on the rack-mounted computing device.
10. The secondary computing device of claim 1 , wherein the operations comprise:
scanning an address space of the low-bandwidth management bus; and
compiling an inventory of responsive electronic devices based on acknowledgement signals sent by electronic devices upon a respective signal being sent to the respective electronic device's address on the low-bandwidth management bus during the scanning.
11. The secondary computing device of claim 1 , wherein the operations comprise:
determining an identity of the electronic device by probing a register address space of the electronic device to obtain an identifier.
12. The secondary computing device of claim 1 , wherein:
the second command is sent via only one electrically conductive path between the off-board microcontroller and the low-bandwidth bus connector.
13. The secondary computing device of claim 1 , wherein:
the off-board microcontroller is configured to monitor and control a plurality of electronic devices on the motherboard solely via the low-bandwidth management bus, without controlling or monitoring the plurality of electronic devices via other busses on the motherboard.
14. The secondary computing device of claim 1 , wherein:
the microcontroller is configured to read a value from register of the electronic device via the low-bandwidth management bus when the rack-mounted computing device is turned off.
15. The secondary computing device of claim 1 , wherein sending the second command comprises, on a given conductor coupled to the low-bandwidth bus connector, in sequence:
transmitting a start bit;
transmitting seven bits in sequence encoding an address of the electronic device on the low-bandwidth management bus;
transmitting a value indicating a write operation;
receiving a first acknowledgement bit from the electronic device;
transmitting eight bits in sequence encoding a command code;
receiving a second acknowledgement bit from the electronic device;
transmitting eight bits in sequence encoding data sent to the electronic device.
16. The secondary computing device of claim 1 , comprising:
means for taking inventory of electronic devices coupled to the low-bandwidth management bus;
means for controlling a motherboard fan speed;
means for communicating via the out-of-band network;
means for monitoring or controlling the rack-mounted computing device without relying on a baseboard management controller of the rack-mounted computing device.
17. The secondary computing device of claim 1 , comprising:
a rack configured to hold a plurality of secondary computing devices, including a given secondary computing device including the low-bandwidth bus connector and the microcontroller;
a rack-specific network configured to couple to each of the secondary computing devices held by the rack; and
a rack-control unit configured to control and monitor rack-mounted computing devices in the rack via the rack-specific network and the plurality of secondary computing devices.
18. The secondary computing device of claim 1 , comprising:
a rack-mounted computing device coupled to the low-bandwidth bus connector.
19. The secondary computing device of claim 18 , wherein:
the rack-mounted computing device comprises memory storing instructions that provide a service via the Internet to a client computing device or a service to other rack-mounted computing devices.
20. The secondary computing device of claim 1 , wherein:
the low-bandwidth management bus is an Intelligent Platform Management Bus (IPMB).
21. The secondary computing device of claim 1 , wherein:
the low-bandwidth management bus is a Power Management Bus (PMBus).
22. A secondary computing device configured to monitor or control a rack-mounted computing device independently of whether the rack-mounted computing device is operating or is turned off, the secondary computing device comprising:
a low-bandwidth bus connector configured to connect to a low-bandwidth management bus on a motherboard of a rack-mounted computing device, wherein the low-bandwidth bus connector is a removable connector and configured to:
be held in place on the motherboard, at least in part, by a resilient member, and
connect to the low-bandwidth management bus via electrical contact with five or fewer conductors, a first conductor of the five or fewer conductors being a clock-signal conductor, a second conductor of the five or fewer conductors being a data conductor, the clock-signal conductor being configured to receive a clock-signal operating at less than 10 MHz; and
an off-motherboard microcontroller electrically coupled to the low-bandwidth bus connector, the microcontroller comprising one or more processors and memory storing instructions that, when executed by at least some of the processors, effectuate operations comprising:
receiving, with an off-motherboard network interface, via an out-of-band network, a first command from a computing device configured to monitor or control a plurality of rack-mounted computing devices;
sending a second command based on the first command via the connector to an electronic device coupled to the low-bandwidth management bus on the motherboard;
receiving a response to the second command via the low-bandwidth management bus from the electronic device; and
transmitting data based on the response, with the off-motherboard network interface, via the out-of-band network, to the computing device configured to monitor or control a plurality of rack-mounted computing devices;
wherein:
a rack is configured to hold a plurality of secondary computing devices, including the secondary computing device including the low-bandwidth bus connector and the microcontroller,
a rack-specific network is configured to couple to each of the secondary computing devices held by the rack; and
a rack-control unit is configured to control and monitor rack-mounted computing devices in the rack via the rack-specific network and the plurality of secondary computing devices.
23. The secondary computing device of claim 22 , comprising:
the off-motherboard network interface communicatively coupled to the one or more processors.
24. The secondary computing device of claim 23 , wherein:
the off-motherboard network interface comprises an Ethernet network interface.
25. The secondary computing device of claim 23 , wherein:
the off-motherboard network interface comprises a powerline communication modem.
26. The secondary computing device of claim 25 , comprising:
a bus-bar connector configured to couple to a bus bar extending past, and providing direct current power to, a plurality of rack-mounted computing devices; and
a filter configured to separate a data signal from direct current power conducted by the bus bar.
27. The secondary computing device of claim 22 , wherein the operations comprise:
adjusting a fan speed of a fan controlled via the motherboard by disengaging control of the fan by the rack-mounted computing device and sending a pulse-width modulated signal having a duty cycle corresponding to a target fan speed.
28. The secondary computing device of claim 22 , wherein the operations comprise:
reading a value from a motherboard temperature sensor indicative of a temperature of a component on the motherboard.
29. The secondary computing device of claim 22 , wherein the operations comprise:
reading a value from a motherboard voltage sensor indicative of a voltage of a conductive trace of the motherboard.
30. The secondary computing device of claim 22 , wherein the operations comprise:
turning off the rack-mounted computing device; and
turning on the rack-mounted computing device.
31. The secondary computing device of claim 22 , wherein the operations comprise:
scanning an address space of the low-bandwidth management bus; and
compiling an inventory of responsive electronic devices based on acknowledgement signals sent by electronic devices upon a respective signal being sent to the respective electronic device's address on the low-bandwidth management bus during the scanning.
32. The secondary computing device of claim 22 , wherein the operations comprise:
determining an identity of the electronic device by probing a register address space of the electronic device to obtain an identifier.
33. The secondary computing device of claim 22 , wherein:
the second command is sent via only one electrically conductive path between the off-board microcontroller and the low-bandwidth bus connector.
34. The secondary computing device of claim 22 , wherein:
the off-board microcontroller is configured to monitor and control a plurality of electronic devices on the motherboard solely via the low-bandwidth management bus, without controlling or monitoring the plurality of electronic devices via other busses on the motherboard.
35. The secondary computing device of claim 22 , wherein:
the microcontroller is configured to read a value from register of the electronic device via the low-bandwidth management bus when the rack-mounted computing device is turned off.
36. The secondary computing device of claim 22 , wherein sending the second command comprises, on a given conductor coupled to the low-bandwidth bus connector, in sequence:
transmitting a start bit;
transmitting seven bits in sequence encoding an address of the electronic device on the low-bandwidth management bus;
transmitting a value indicating a write operation;
receiving a first acknowledgement bit from the electronic device;
transmitting eight bits in sequence encoding a command code;
receiving a second acknowledgement bit from the electronic device;
transmitting eight bits in sequence encoding data sent to the electronic device.
37. The secondary computing device of claim 22 , comprising:
means for taking inventory of electronic devices coupled to the low-bandwidth management bus;
means for controlling a motherboard fan speed;
means for communicating via the out-of-band network;
means for monitoring or controlling the rack-mounted computing device without relying on a baseboard management controller of the rack-mounted computing device.
38. The secondary computing device of claim 22 , comprising:
a rack-mounted computing device coupled to the low-bandwidth bus connector.
39. The secondary computing device of claim 38 , wherein:
the rack-mounted computing device comprises memory storing instructions that provide a service via the Internet to a client computing device or a service to other rack-mounted computing devices.
40. The secondary computing device of claim 22 , wherein:
the low-bandwidth management bus is a System Management Bus (SMBus).
41. The secondary computing device of claim 22 , wherein:
the low-bandwidth management bus is an Intelligent Platform Management Bus (IPMB).
42. The secondary computing device of claim 22 , wherein:
the low-bandwidth management bus is a Power Management Bus (PMBus).