Prepregs and laminates having a UV curable resin layer

1. A method for embedding an electronic device in a printed circuit board layer comprising the steps of:

applying a mask layer to a prepreg having a first thermally curable resin layer that is at least partially cured, a second thermally curable resin layer that is at least partially cured and a UV curable resin layer positioned between the first thermally curable resin layer and the second thermally curable resin layer wherein the mask layer is applied to an exposed surface to one of the first thermally curable resin layer or the second thermally curable resin layer and wherein the mask layer has at least one UV light opaque portion and at least one UV light transparent portion;

directing UV light at the UV mask layer for a time sufficient to cure the UV curable resin layer below the UV light transparent portion of the prepreg to form a partially UV cured prepreg including an uncured UV curable resin portion located below the UV light opaque portion of the mask layer and a cured UV curable resin portion located below the UV light transparent portion of the mask layer;

placing a planar structured inner layer having a first and second surface and including at least one electrical component that is located on a first surface of the structured inner layer into contact with the first thermally curable resin layer such that the at least one electrical component is in registration with the at least one uncured UV curable resin portion to form a stack; and

subjecting the stack to laminating conditions including temperatures and pressures sufficient to cause the UV light curable resin layer portion and the partially cured thermally curable resin of the first thermally curable resin layers become liquid, flow around the electrical component and substantially fill gaps between the prepreg and the structured inner layer to form a laminate having at least one embedded electrical component wherein the first thermally curable resin layer does not include a cavity in which the at least one electrical component is located.

2. The prepreg of claim 1 wherein at least one of the first thermally curable resin layer and the second thermally curable resin layer are b-staged thermally curable resin layers.

3. The prepreg of claim 2 wherein both the first thermally curable resin layer and the second thermally curable resin layer are b-staged.

4. The method of claim 1 wherein the electrical component is at least partially embedded in the UV curable resin layer.

5. The method of claim 1 wherein the mask layer is a copper layer that has been etched to form the at least one UV light transparent portion.

6. The method of claim 1 wherein the structured inner layer includes a plurality of electrical components that are to be embedded wherein each of the plurality of electrical components that are to be embedded are in registration with a complementary uncured UV curable resin portion of the prepreg.

7. The method of claim 1 wherein laminate having the at least one embedded electrical component is an intermediate laminate that is used in further printed circuit board manufacturing step.

8. The method of claim 1 wherein the first thermally curable resin layer and the second thermally curable resin layers each have a thickness of from about 5 μm to about 40 μm.

9. The prepreg of claim 1 wherein the first thermally curable resin layer and the second thermally curable resin layer each have a thickness of about 5 μm to about 15 μm.

10. The prepreg of claim 1 wherein the UV curable resin layer has a thickness of from about 10 μm to about 500 μm.

11. The prepreg of claim 1 wherein the UV curable resin layer has a thickness of from about 20 μm to about 200 μm.

12. The prepreg of claim 1 wherein one of the first thermally curable resin layer and second thermally curable resin layer is a c-staged thermally curable resin layer.

13. The prepreg of claim 1 wherein the first thermally curable resin layer includes a copper coated surface.