IP Library Granted Patent US 10,216,972
Granted Patent B2
US 10,216,972 · App. 15/406,109 · Granted Feb 26, 2019

Pixel architecture and driving scheme for biometric sensing

Inventors: Arash Akhavan Fomani (Sunnyvale, CA); Kirk Hargreaves (Mountain View, CA); Patrick Smith (San Jose, CA)
Assignee: SYNAPTICS INCORPORATED
G06K9/0002G06F3/0416G06F3/044G06F3/047
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Quick Facts
Patent No.
US 10,216,972
App. No.
15/406,109
Granted
Feb 26, 2019
Kind
B2
Abstract

Embodiments herein describe an input device that includes a rectangular array of sensor electrodes connected to sensor modules that measure capacitive sensing signals corresponding to the electrodes. During a charge stage, the input device applies a charging voltage to neighboring sensor electrodes in the array. The input device then drives the neighboring sensor electrodes to a reference voltage and measures the amount of charge accumulated on at least one of the sensor electrodes. Because of the parasitic capacitance between the neighboring electrodes, driving these electrodes (even the ones not being measured) to the same charging and reference voltages reduces the effect of the parasitic capacitance on the capacitive sensing measurement. Thus, during the read stage, the measured charge is affected primarily by the capacitance between the sensor electrodes and an input object (e.g., a finger).

Claims (55)

1. A processing system for performing capacitive sensing, the processing system comprising:

a controller circuit configured to apply, during a charge stage, a charging voltage to a first sensor electrode and a second sensor electrode, wherein the first sensor electrode neighbors the second sensor electrode in an array of sensor electrodes; and

a sensor circuit configured to, during a read stage:

drive the first sensor electrode to a reference voltage; and

measure a first charge stored on the first sensor electrode resulting from applying the charging voltage, wherein the controller circuit is configured to bias the second sensor electrode to the reference voltage during the read stage.

2. The processing system of claim 1 , wherein there is no voltage difference between the first and second sensor electrodes upon the completion of the charge stage and the read stage.

3. The processing system of claim 1 , wherein the controller circuit is configured to:

apply, during the charge stage, the charging voltage to a third sensor electrode in a same column as the first sensor electrode in the array; and

connect the first and third sensor electrodes to a same sense line during the read stage, and

wherein the sensor circuit is configured to:

measure, during the read stage, a sum of charges stored on the first and third sensor electrodes using the same sense line resulting from applying the charging voltage.

4. The processing system of claim 1 , wherein a second charge stored on the second sensor electrode resulting from applying the charging voltage during the charging stage is not measured by the processing system during the read stage.

5. The processing system of claim 4 , wherein the controller circuit is configured to apply, during the charge stage, the charging voltage to a third sensor electrode that neighbors the first sensor electrode in the array, wherein the first and third sensor electrodes are in a same column and the first and second sensor electrodes are in a same row, and

wherein a third charge stored on the third sensor electrode resulting from applying the charging voltage during the charging stage is not measured by the processing system during the read stage.

6. The processing system of claim 5 , wherein the controller circuit is configured to:

drive the third sensor electrode to the reference voltage during a precondition stage occurring between the charge stage and the read stage, wherein the first sensor electrode and the second sensor electrode are electrically floating during the precondition stage.

7. The processing system of claim 5 , wherein the controller circuit is configured to:

drive the second and third sensor electrodes to the reference voltage during a precondition stage occurring between the charge stage and the read stage, wherein the first sensor electrode is electrically floating during the precondition stage.

8. The processing system of claim 1 , wherein sensor electrodes in the array have a pitch suitable for distinguishing between features of a fingerprint.

9. An input device, comprising:

a plurality of sensor electrodes arranged in an array;

a processing system configured to:

apply, during a charge stage, a charging voltage to a first sensor electrode and a second sensor electrode of the plurality of sensor electrodes, wherein the first sensor electrode neighbors the second sensor electrode;

drive, during a read stage, the first sensor electrode to a reference voltage; and

measure, during the read stage, a first charge stored on the first sensor electrode resulting from applying the charging voltage, wherein the second sensor electrode is biased to the reference voltage during the read stage.

10. The input device of claim 9 , wherein there is no voltage difference between the first and second sensor electrodes upon the completion of the charge stage and the read stage.

11. The input device of claim 9 , wherein the processing system is configured to:

apply, during the charge stage, the charging voltage to a third sensor electrode in a same column as the first sensor electrode in the array;

connect the first and third sensor electrodes to a same sense line during the read stage; and

measure, during the read stage, a sum of charges stored on the first and third sensor electrodes using the same sense line resulting from applying the charging voltage.

12. The input device of claim 9 , wherein a second charge stored on the second sensor electrode resulting from applying the charging voltage during the charging stage is not measured by the processing system during the read stage.

13. The input device of claim 12 , wherein the processing system is configured to apply, during the charge stage, the charging voltage to a third sensor electrode that neighbors the first sensor electrode in the array, wherein the first and third sensor electrodes are in a same column and the first and second sensor electrodes are in a same row, and

wherein a third charge stored on the third sensor electrode resulting from applying the charging voltage during the charging stage is not measured by the processing system during the read stage.

14. The input device of claim 13 , wherein the processing system is configured to:

drive the third sensor electrode to the reference voltage during a precondition stage occurring between the charge stage and the read stage, wherein the first sensor electrode and the second sensor electrode are electrically floating during the precondition stage.

15. The input device of claim 13 , wherein the processing system is configured to:

drive the second and third sensor electrodes to the reference voltage during a precondition stage occurring between the charge stage and the read stage, wherein the first sensor electrode is electrically floating during the precondition stage, and wherein, during the charge stage, the second sensor electrode is connected to a drive line in response to a first select line and, during the precondition stage, the second sensor electrode is connected to the drive line in response to a second select line.

16. The input device of claim 9 , wherein the plurality of sensor electrodes in the array has a pitch suitable for distinguishing between features of a fingerprint.

17. The input device of claim 9 , further comprising:

a sense select line coupled to a row of the plurality of sensor electrodes;

a drive select line coupled to the row of the plurality of sensor electrodes;

a sense line coupled to a column of the plurality of sensor electrodes; and

a drive line coupled to the column of the plurality of sensor electrodes;

wherein the processing system is configured to:

apply the charging voltage to the first sensor electrode and the second sensor electrode via the drive line, wherein during the charge stage the first sensor electrode and the second sensor electrode are selected from the column of sensor electrodes via the drive select line; and

measure the first charge stored on the first sensor electrode via the sense line, wherein during the read stage the first sensor electrode is selected from the column of sensor electrodes via the sense select line.

18. A method for performing capacitive sensing, the method comprising:

applying, during a charge stage, a charging voltage to a first sensor electrode and a second sensor electrode, wherein the second sensor electrode neighbors the first sensor electrode in an array of sensor electrodes;

driving, during a read stage, the first sensor electrode to a reference voltage; and

measuring, during the read stage, a first charge stored on the first sensor electrode resulting from applying the charging voltage, wherein the second sensor electrode is biased to the reference voltage during the read stage.

19. The method of claim 18 , wherein a second charge stored on the second sensor electrode resulting from applying the charging voltage during the charging stage is not measured during the read stage.

20. The method of claim 18 , further comprising:

applying, during the charge stage, the charging voltage to a third sensor electrode in a same column as the first sensor electrode in the array;

coupling the first and third sensor electrodes to a same sense line during the read stage; and

measuring, during the read stage, a sum of charges stored on the first and third sensor electrodes using the same sense line resulting from applying the charging voltage.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 051316 FRAME: 0777. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 18, 2020
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 052186/0756 →
SECURITY INTEREST Recorded Dec 16, 2019
From: SYNAPTICS INCORPROATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 051316/0777 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2017
From: AKHAVAN FOMANI, ARASH; HARGREAVES, KIRK; SMITH, PATRICK
To: SYNAPTICS INCORPORATED
Reel/Frame 040981/0066 →
Continuity (1)
Related Publication 20180204036A1 · Jul 19, 2018