IP Library Granted Patent US 10,103,191
Granted Patent B2
US 10,103,191 · App. 15/407,224 · Granted Oct 16, 2018

Semiconductor die and method of packaging multi-die with image sensor

Inventor: Yu-Te Hsieh (Taoyuan, TW)
Assignee: Semiconductor Components Industries, LLC
H01L27/14634H01L27/1469H01L27/14618H01L27/14632H01L27/14636H01L27/14687H01L27/14698
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Quick Facts
Patent No.
US 10,103,191
App. No.
15/407,224
Granted
Oct 16, 2018
Kind
B2
Abstract

A semiconductor wafer has an image sensor area with a light transmissive wafer, such as glass, disposed over the semiconductor wafer. A portion of the semiconductor wafer is removed to thin the wafer. A semiconductor die is disposed over a surface of the semiconductor wafer opposite the light transmissive wafer. An encapsulant is deposited around the semiconductor die. A portion of the encapsulant is removed to planarize the encapsulant. A conductive via is formed through the semiconductor wafer and first encapsulant. An interconnect structure is formed over the encapsulant and semiconductor die. The interconnect structure includes multiple insulating layers and multiple conductive layers. The multiple insulating layers can be an encapsulant. The semiconductor wafer is singulated to form a multi-die semiconductor package, which integrates the image sensor semiconductor die with other types of semiconductor die to enhance the image performance within the multi-die package.

Claims (24)

1. A method of making a semiconductor device including an image sensor, comprising:

providing a semiconductor wafer including an image sensor area;

disposing a light transmissive wafer over the semiconductor wafer;

disposing a semiconductor die over a surface of the semiconductor wafer opposite the light transmissive wafer;

depositing a first encapsulant around the semiconductor die; and

forming an interconnect structure over the first encapsulant and semiconductor die, wherein forming the interconnect structure includes,

(a) forming a first insulating layer over the first encapsulant and semiconductor die,

(b) forming a first conductive layer over the first insulating layer,

(c) forming a second insulating layer over the first insulating layer and first conductive layer, and

(d) forming a second conductive layer over the first conductive layer and second insulating layer.

2. The method of claim 1 , further including forming a conductive via through the semiconductor wafer and first encapsulant.

3. The method of claim 1 , further including removing a portion of the semiconductor wafer.

4. The method of claim 1 , further including removing a portion of the first encapsulant.

5. The method of claim 1 , wherein the light transmissive wafer includes glass.

6. A method of making a semiconductor device including an image sensor, comprising:

providing a semiconductor wafer including an image sensor area;

disposing a light transmissive wafer over the semiconductor wafer;

disposing a semiconductor die over a surface of the semiconductor wafer opposite the light transmissive wafer;

depositing a first encapsulant around the semiconductor die; and

forming an interconnect structure over the first encapsulant and semiconductor die, wherein forming the interconnect structure includes,

(a) forming a second encapsulant over the first encapsulant and semiconductor die,

(b) forming a first conductive layer over the second encapsulant,

(c) forming a third encapsulant over the second encapsulant and first conductive layer, and

(d) forming a second conductive layer over the first conductive layer and third encapsulant.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 04481, FRAME 0541 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0459 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2017
From: HSIEH, YU-TE
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 040978/0620 →
Continuity (1)
Related Publication 20180204866A1 · Jul 19, 2018