IP Library Granted Patent US 10,460,670
Granted Patent B2
US 10,460,670 · App. 15/407,605 · Granted Oct 29, 2019

Display device and method for controlling the same

Inventor: Tomoyuki Maeda (Tokyo, JP)
Assignee: JOLED INC.
G09G3/3266G09G3/2018G09G3/3233G09G3/3291G09G2300/043G09G2300/0819G09G2300/0842G09G2310/0251G09G2310/08
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Quick Facts
Patent No.
US 10,460,670
App. No.
15/407,605
Granted
Oct 29, 2019
Kind
B2
Abstract

A display device is provided that includes a plurality of pixels, each of which includes an electroluminescent (EL) element and a drive transistor that controls a current flowing through the EL element. The display device also includes a gate driver circuit that applies, to each of the plurality of pixels, a compensation voltage for compensating a threshold voltage of the drive transistor, in each of compensation voltage application periods included in a period other than a period in which a video signal voltage is applied. The display device further includes a control circuit that controls the gate driver circuit, wherein the control circuit adjusts a length of, among the compensation voltage application periods, a preceding compensation voltage application period immediately before the video signal voltage is applied.

Claims (18)

1. A display device, comprising:

a plurality of pixels, each of which includes an electroluminescent (EL) element and a drive transistor that controls a current flowing through the EL element;

a gate driver circuit that applies, to each of the plurality of pixels, a compensation voltage enable pulse for compensating a threshold voltage of the drive transistor, in each of compensation voltage application periods included in a period other than a period in which a video signal voltage is applied; and

a control circuit that controls the gate driver circuit,

wherein the control circuit adjusts a length of, among the compensation voltage application periods, a preceding compensation voltage application period immediately before the video signal voltage is applied,

wherein the control circuit adjusts the length of the preceding compensation voltage application period based on a timing of a vertical synchronization signal,

wherein a compensation voltage is applied to a gate terminal of the drive transistor of each of the plurality of pixels a predetermined number of compensation voltage application periods in a predetermined compensation operation period that causes a gradual reduction of a pixel voltage to approach the threshold voltage of the drive transistor, and

wherein the predetermined number of compensation application voltage periods is in the range of 20-30.

2. The display device according to claim 1 ,

wherein the control circuit adjusts the preceding compensation voltage application period to be longer as an interval between two vertical synchronization signals immediately before the video signal voltage is applied is shorter.

3. The display device according to claim 1 ,

wherein the compensation voltage is applied to the plurality of pixels via data lines for applying the video signal voltage to the plurality of pixels.

4. A method for controlling a display device, including a plurality of pixels each of which includes an EL element and a drive transistor that controls a current flowing through the EL element, the method comprising:

applying, to each of the plurality of pixels, a compensation voltage for compensating a threshold voltage of the drive transistor, in each of compensation voltage application periods included in a period other than a period in which a video signal voltage is applied;

adjusting a length of, among the compensation voltage application periods, a preceding compensation voltage application period immediately before the video signal voltage is applied;

adjusting the length of the preceding compensation voltage application period based on a timing of a vertical synchronization signal,

applying a compensation voltage to a gate terminal of the drive transistor of each of the plurality of pixels a predetermined number of compensation voltage application periods in a predetermined compensation operation period to cause a gradual reduction of a pixel voltage to approach the threshold voltage of the drive transistor, and

wherein the predetermined number of compensation application voltage periods is in the range of 20-30.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2018
From: JAPAN DISPLAY INC.
To: JOLED INC.
Reel/Frame 046319/0612 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2017
From: MAEDA, TOMOYUKI
To: JOLED INC.; JAPAN DISPLAY INC.
Reel/Frame 040987/0575 →
Priority Claims (1)
JP 2016-008238 · Jan 19, 2016 · national
Continuity (1)
Related Publication 20170206841A1 · Jul 20, 2017