IP Library Granted Patent US 9,991,803
Granted Patent B1
US 9,991,803 · App. 15/408,709 · Granted Jun 5, 2018

Reduction of electromagnetic interference in a flyback converter

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Quick Facts
Patent No.
US 9,991,803
App. No.
15/408,709
Granted
Jun 5, 2018
Kind
B1
Abstract

A method for reducing electromagnetic interference in a flyback converter includes activating a first switch to generate a primary current therein. The first switch is deactivated to generate a secondary current from a magnetic flux generated by the primary current. The magnetic flux is removed by the generation of the secondary current. A second switch is activated with a first voltage pulse to limit an excess voltage across the first switch. The excess voltage is generated in response to the deactivation of the first switch. A second switch is activated with a second voltage pulse to limit a voltage oscillation across the first switch. The voltage oscillation occurs after the removal of the magnetic flux. A first pulse width of the first voltage pulse is increased by a first jitter delay. A second pulse width of the second voltage pulse is increased by a second jitter delay.

Claims (33)

1. A flyback converter comprising:

a primary-side switch configured to ground a primary winding of a transformer;

an active clamp circuit configured to limit an excess voltage across the primary-side switch; and

an active clamp flyback (ACF) controller connected to the active clamp circuit and the primary-side switch, the ACF controller comprising:

a first pulse generator configured to activate the primary-side switch to generate a magnetic flux in the transformer, and configured to deactivate the primary-side switch to generate, from the magnetic flux, a secondary current in a secondary winding of the transformer, the magnetic flux removed by the generation of the secondary current, and

a second pulse generator configured to activate the active clamp circuit with a first voltage pulse followed by a second voltage pulse, the first voltage pulse activating the active clamp circuit to limit the excess voltage in response to the primary-side switch being deactivated, and the second voltage pulse limiting a voltage oscillation across the primary-side switch in response to a magnetizing inductance of the transformer resonating with an effective capacitance of the primary-side switch, the resonance occurring after the removal of the magnetic flux, a first width of the first voltage pulse increased by a first jitter delay and a second width of the second voltage pulse increased by a second jitter delay.

2. The converter of claim 1 wherein the active clamp circuit comprises an N-channel transistor connected in series with a clamp capacitor, the active clamp circuit connected in parallel with the primary winding of the transformer.

3. The converter of claim 1 wherein the active clamp circuit comprises a P-channel transistor connected in series with a clamp capacitor, the active clamp circuit connected between a drain of the primary-side switch and a ground terminal.

4. The converter of claim 1 wherein a waveform generator comprises the first pulse generator and the second pulse generator.

5. The converter of claim 1 wherein a leading edge of the second voltage pulse coincides with a maximum of a resonant voltage of the voltage oscillation.

6. The converter of claim 1 wherein the first jitter delay is added to a first trailing edge of the first voltage pulse, and the second jitter delay is added to a second trailing edge of the second voltage pulse.

7. The converter of claim 1 wherein the first jitter delay is equal to the second jitter delay.

8. The converter of claim 1 wherein the first jitter delay and the second jitter delay are each respective ones of a plurality of jitter delays chosen to reduce an amplitude of a radiated emission of at least one of the excess voltage and a resonant voltage of the voltage oscillation below an electromagnetic interference limit.

9. An active clamp flyback (ACF) controller comprising:

a first pulse generator configured to activate a first switch to generate a primary current therein, and configured to deactivate the first switch to generate a secondary current from a magnetic flux generated by the primary current, the magnetic flux removed by the generation of the secondary current; and

a second pulse generator configured to activate a second switch connected to the first switch, with a first voltage pulse followed by a second voltage pulse, the first voltage pulse limiting an excess voltage across the first switch, the excess voltage generated in response to the deactivation of the first switch, and the second voltage pulse limiting a voltage oscillation across the first switch, the voltage oscillation occurring after the removal of the magnetic flux, a first width of the first voltage pulse increased by a first jitter delay and a second width of the second voltage pulse increased by a second jitter delay.

10. The controller of claim 9 wherein the first switch is a primary-side switch configured to generate the primary current in a primary winding of a transformer, the magnetic flux in the transformer, and the secondary current in a secondary winding of the transformer.

11. The controller of claim 9 wherein a waveform generator comprises the first pulse generator and the second pulse generator.

12. The controller of claim 9 wherein a leading edge of the second voltage pulse coincides with a maximum of a resonant voltage of the voltage oscillation.

13. The controller of claim 9 wherein the first jitter delay is added to a first trailing edge of the first voltage pulse and the second jitter delay is added to a second trailing edge of the second voltage pulse.

14. The controller of claim 9 wherein the first jitter delay is equal to the second jitter delay.

15. The controller of claim 9 wherein the first jitter delay and the second jitter delay are each respective ones of a plurality of jitter delays chosen to reduce an amplitude of a radiated emission of at least one of the excess voltage and a resonant voltage of the voltage oscillation below an electromagnetic interference limit.

16. A method for reducing electromagnetic interference in a flyback converter comprising:

activating a first switch to generate a primary current therein;

deactivating the first switch to generate a secondary current from a magnetic flux generated by the primary current, the magnetic flux removed by the generation of the secondary current;

activating a second switch with a first voltage pulse to limit an excess voltage across the first switch, the excess voltage generated in response to the deactivation of the first switch;

activating the second switch with a second voltage pulse to limit a voltage oscillation across the first switch, the voltage oscillation occurring after the removal of the magnetic flux;

increasing a first pulse width of the first voltage pulse by a first jitter delay; and

increasing a second pulse width of the second voltage pulse by a second jitter delay.

17. The method of claim 16 wherein generating the second voltage pulse includes gating the leading edge of the second pulse to coincide with a maximum of a resonant voltage of the voltage oscillation.

18. The method of claim 16 wherein increasing the first pulse width and the second pulse width includes delaying a respective trailing edge of the first voltage pulse and the second voltage pulse by the respective first jitter delay and second jitter delay.

19. The method of claim 16 further comprising increasing the first pulse width and the second pulse width by a same jitter delay.

20. The method of claim 19 wherein a subsequent first pulse width of a subsequent first voltage pulse and a subsequent second pulse width of a subsequent second voltage pulse are each increased by a different jitter delay than the first jitter delay and the second jitter delay of the respective first voltage pulse and the second voltage pulse, thereby reducing an amplitude of a radiated emission of the flyback converter below an electromagnetic interference limit.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 04481, FRAME 0541 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0459 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2017
From: WANG, ZHAO-JUN; RANA, DIBYENDU
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 041849/0949 →