IP Library Patent Application 15417804
Patent Application
App. No. 15/417,804

SYSTEMS AND METHODS FOR MONOLITHICALLY ISLED SOLAR PHOTOVOLTAIC CELLS AND MODULES

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Patent No.
US None
App. No.
15/417,804
Abstract

According to one aspect of the disclosed subject matter, a monolithically isled solar cell is provided. The solar cell comprises a semiconductor layer having a light receiving frontside and a backside opposite the frontside and attached to an electrically insulating backplane. A trench isolation pattern partitions the semiconductor layer into electrically isolated isles on the electrically insulating backplane. A first metal layer having base and emitter electrodes is positioned on the semiconductor layer backside. A patterned second metal layer providing cell interconnection and connected to the first metal layer by via plugs is positioned on the backplane.

Claims (44)

1 . A monolithic photovoltaic module structure, comprising:

(a) a plurality of monolithically-isled (or monolithically-tiled) solar cells, each of said solar cells comprising:

(i) a semiconductor layer with a background doping, comprising a sunlight-receiving frontside and a backside opposite said sunlight-receiving frontside;

(ii) a patterned first metal layer (M1) disposed on said semiconductor layer backside;

(b) an electrically insulating continuous backplane support layer attached to said semiconductor layer backsides of said plurality of monolithically-isled (or monolithically-tiled) solar cells, said solar cells positioned on and attached to said continuous backplane support layer according to a desired closely-spaced cell array pattern;

(c) a trench isolation pattern partitioning said semiconductor layer in each of said plurality of monolithically-isled (or monolithically-tiled) solar cells into a plurality of solar cell semiconductor regions on said electrically insulating continuous backplane support layer;

(d) a patterned second metal layer (M2) disposed on said electrically insulating continuous backplane support layer attached to said semiconductor layer backsides of said plurality of monolithically-isled (or monolithically-tiled) solar cells;

(e) a plurality of electrically conductive via plugs formed through said electrically insulating continuous backplane support layer interconnecting select portions of said patterned second-level metal layer to select portions of said patterned first-level metal layer in each of said plurality of monolithically-isled (or monolithically-tiled) solar cells;

(f) said patterned first-level metal layer, said patterned second-level metal layer, and said plurality of electrically conductive via plugs designed to complete the electrical metallization and interconnections within each of said monolithically-isled (or monolithically-tiled) solar cells, and among said plurality of monolithically-isled (or monolithically-tiled) solar cells based on a desired electrical interconnection arrangement comprising one or a combination of series, parallel, and hybrid parallel-series interconnections;

(g) optically transparent protective frontside cover and frontside encapsulation sheets attached to said electrically insulating continuous backplane support layer covering said sunlight-receiving frontsides of said plurality of monolithically-isled (or monolithically-tiled) solar cells;

(h) protective backside cover and backside encapsulation sheets attached to said electrically insulating continuous backplane support layer opposite said sunlight-receiving frontsides;

(i) at least a pair of electrical connector leads.

2 . The monolithic photovoltaic module structure of claim 1 , wherein said monolithic photovoltaic module is a flexible, lightweight module.

3 . The monolithic photovoltaic module structure of claim 1 , wherein said monolithic photovoltaic module is a rigid glass-covered module.

4 . The monolithic photovoltaic module structure of claim 1 , wherein said monolithic photovoltaic module is a building-integrated photovoltaic (BIPV) rooftop shingle module.

5 . The monolithic photovoltaic module structure of claim 1 , wherein said monolithic photovoltaic module is a building-integrated photovoltaic (BIPV) rooftop tile module.

6 . The monolithic photovoltaic module structure of claim 1 , wherein said monolithic photovoltaic module is an automotive sunroof module.

7 . The monolithic photovoltaic module structure of claim 1 , further comprising a plurality of bypass switches associated with said plurality of monolithically-isled (or monolithically-tiled) solar cells for distributed shade management.

8 . The monolithic photovoltaic module structure of claim 1 , further comprising a plurality of bypass Schottky diodes associated with said plurality of monolithically-isled (or monolithically-tiled) solar cells for distributed shade management.

9 . The monolithic photovoltaic module structure of claim 1 , further comprising a plurality of bypass pn junction diodes associated with said plurality of monolithically-isled (or monolithically-tiled) solar cells for distributed shade management.

10 . The monolithic photovoltaic module structure of claim 1 , further comprising a plurality of maximum-power-point-tracking (MPPT) power optimizers associated with said plurality of monolithically-isled (or monolithically-tiled) solar cells for enhanced power harvest.

11 . A method of producing photovoltaic module laminate comprising a plurality of monolithically-integrated solar cell and bypass switch semiconductor structures, comprising:

(a) producing each of said monolithically-integrated solar cell and bypass switch semiconductor structures using a plurality of fabrication processes, comprising:

(i) performing at least a portion of said plurality of fabrication processes on a semiconductor layer, comprising a frontside surface and a backside surface;

(ii) attaching an electrically insulating continuous backplane to said backside surface of said semiconductor layer;

(iii) producing an isolation pattern through said semiconductor layer to form a plurality of isles, and to partition said solar cell and said bypass switch into separate semiconductor layer regions on said electrically insulating continuous backplane;

(iv) performing the remaining portion of said plurality of fabrication processes;

(b) electrically interconnecting and laminating said plurality of monolithically-integrated solar cell and bypass switch semiconductor structures to produce said photovoltaic module laminate.

12 . The method of claim 11 , wherein said photovoltaic module laminate is formed of a flexible photovoltaic material.

13 . The method of claim 11 , wherein said photovoltaic module laminate is formed of a rigid glass-covered photovoltaic material.

14 . A method of producing photovoltaic module laminate comprising a plurality of integrated solar cell and bypass switch structures, comprising:

(a) producing each of said integrated solar cell and bypass switch structures using a plurality of processes, comprising:

(i) performing at least a portion of said plurality of processes on a semiconductor layer;

(ii) attaching a continuous backplane to a surface of said semiconductor layer;

(iii) producing an isolation pattern through said semiconductor layer to form a plurality of isles, and to partition said solar cell and said bypass switch on said continuous backplane;

(iv) performing the remaining portion of said plurality of processes;

(b) electrically interconnecting and laminating said plurality of integrated solar cell and bypass switch structures to produce said photovoltaic module laminate.

15 . The method of claim 14 , wherein said photovoltaic module laminate is formed of a flexible photovoltaic material.

16 . The photovoltaic module laminate of claim 14 , wherein said photovoltaic module laminate is formed of a rigid glass-covered photovoltaic material.

17 . A monolithically isled semiconductor solar cell, comprising:

a master cell semiconductor substrate attached to a backside backplane, said master cell comprising a plurality of electrically isolated isles, each of said isles electrically isolated by isolation trenches formed through said master cell semiconductor substrate to said backside backplane, each of said isles comprising a light capturing frontside surface and a backside surface for forming emitter and base contacts; and

emitter regions and base regions positioned on said backside surface of said isles; said backside backplane comprising an electrically conductive metallization layer having a pattern of emitter electrodes and base electrodes corresponding to said emitter regions and said base regions.

67 .- 76 . (canceled)

101 .- 107 . (canceled)

Assignments (6)
ASSIGNMENT OF LOAN DOCUMENTS Recorded Sep 29, 2017
From: OPUS BANK
To: OB REALTY, LLC
Reel/Frame 044062/0383 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2017
From: MOSLEHI, MEHRDAD M.
To: SOLEXEL, INC.
Reel/Frame 043125/0463 →
CHANGE OF NAME Recorded Jul 28, 2017
From: SOLEXEL, INC.
To: BEAMREACH SOLAR, INC.
Reel/Frame 043367/0649 →
RECORDATION OF FORECLOSURE OF PATENT PROPERTIES Recorded Jul 27, 2017
From: OB REALTY, LLC
To: OB REALTY, LLC
Reel/Frame 043350/0822 →
CHANGE OF NAME Recorded Jul 26, 2017
From: SOLEXEL, INC.
To: BEAMREACH SOLAR, INC.
Reel/Frame 043342/0439 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2017
From: MOSLEHI, MEHRDAD M.
To: SOLEXEL, INC.
Reel/Frame 042230/0841 →