IP Library Granted Patent US 10,664,311
Granted Patent B1
US 10,664,311 · App. 15/421,202 · Granted May 26, 2020

Timer object management for a multiprocessor virtual environment

Inventors: Maxim Davgalev (Bellevue, WA); Nikolay Dobrovolskiy (Moscow, RU); Serguei M. Beloussov (Singapore, SG)
Assignee: Parallels International GmbH
G06F9/4887G06F9/45504
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Quick Facts
Patent No.
US 10,664,311
App. No.
15/421,202
Granted
May 26, 2020
Kind
B1
Abstract

A new timer object that is associated with a timer event may be identified. A virtual processor that is to be provided the timer event that is associated with the new timer object may be determined. One or more current timer objects that are associated with one or more timer events provided to the virtual processor may also be identified. A new element for the new timer object may be created in a list identifying the one or more current timer objects that are associated with the one or more timer events that are provided to the virtual processor.

Claims (67)

1. A method comprising:

identifying, by a host computer system, a particular timer object associated with an expiration time;

identifying a first virtual processor implemented by the host computer system to be associated with the particular timer object;

identifying a global list referencing a plurality of timer objects associated with the host computer system, wherein the global list is sorted by expiration times of the timer objects associated with the host computer system;

inserting, based on the expiration time, a global element associated with the particular timer object into the global list;

identifying a first processor-specific list referencing a plurality of timer objects associated with the first virtual processor, wherein the first processor-specific list is sorted by expiration times of the timer objects associated with the first virtual processor;

inserting, based on the expiration time, a first element associated with the particular timer object into the first processor-specific list, wherein the first element references the global element and a second element of a second processor-specific list associated with a second virtual processor implemented by the host computer system;

identifying, using the first processor-specific list, a nearest timer event corresponding to a nearest timer object associated with the first virtual processor; and

executing, by the first virtual processor, guest executable code until the nearest timer event.

2. The method of claim 1 , further comprising:

receiving a request to remove a specified timer object;

removing a first element associated with the specified timer object from the global list; and

removing a second element associated with the specified timer object from the first processor-specific list.

3. The method of claim 2 , further comprising:

modifying a pointer of a previous element of the global list to point to a next element of the global list, wherein the previous element precedes the element associated with the specified timer object, and wherein the next element follows the element associated with the specified timer object.

4. The method of claim 2 , further comprising:

removing a third element associated with the specified timer object from the second processor-specific list.

5. The method of claim 1 , further comprising:

identifying the first virtual processor based on an affinity mask associated with the particular timer object.

6. The method of claim 1 , wherein executing the guest code further comprises:

limiting duration of a sleep state of the first virtual processor by the nearest timer event.

7. The method of claim 1 , wherein the second element of a second processor-specific list is associated with the particular timer object.

8. A host computer system comprising:

a memory; and

a processing device, operatively coupled with the memory, to:

identify a particular timer object that is associated with a timer event an expiration time;

identify a first virtual processor implemented by the host computer system that is to be provided the timer event that is associated with the particular timer object;

identify a global list referencing a plurality of timer objects associated with the host computer system, wherein the global list is sorted by expiration times of the timer objects associated with the host computer system;

insert, based on the expiration time, a global element associated with the particular timer object into the global list;

identify a first processor-specific list referencing a plurality of timer objects associated with the first virtual processor, wherein the first processor-specific list is sorted by expiration times of the timer objects associated with the first virtual processor;

insert, based on the expiration time, a first element associated with the particular timer object into the first processor-specific list, wherein the first element references the global element and a second element of a second processor-specific list associated with a second virtual processor implemented by the host computer system that are associated with the timer events provided to the virtual processor;

identify, using the first processor-specific list, a nearest timer event corresponding to a nearest timer object associated with the first virtual processor; and

execute, by the first virtual processor, guest executable code until the nearest timer event.

9. The host computer system of claim 8 , wherein the processing device is further to:

receive a request to remove a particular specified timer object;

remove a first element associated with the specified timer object from the global list; and

remove a second element associated with the specified timer object from the first processor-specific list.

10. The host computer system of claim 9 , wherein the processing device is further to:

modify a pointer of a previous element of the global list to point to a next element of the global list, wherein the previous element precedes the element associated with the specified timer object, and wherein the next element follows the element associated with the specified timer object.

11. The host computer system of claim 9 , wherein the processing device is further to:

removing a third element associated with the specified timer object from the second processor-specific list.

12. The host computer system of claim 8 , wherein the processing device is further to:

identify the first virtual processor based on an affinity mask associated with the particular timer object.

13. The host computer system of claim 8 , wherein executing the guest code further comprises:

limiting duration of a sleep state of the first virtual processor by the nearest timer event.

14. The host computer system of claim 8 , wherein the second element of a second processor-specific list is associated with the particular timer object.

15. A non-transitory computer readable medium storing instructions that, when executed by a processing device of a host computer system, cause the processing device to perform operations comprising:

identifying a particular timer object that is associated with a timer event an expiration time;

identifying determining a first virtual processor implemented by the host computer system that is to be provided the timer event that is associated with the particular timer object;

identifying a global list referencing a plurality of timer objects associated with the host computer system, wherein the global list is sorted by expiration times of the timer objects associated with the host computer system;

inserting, based on the expiration time, a global element associated with the particular timer object into the global list;

identifying a first processor-specific list referencing a plurality of timer objects associated with the first virtual processor, wherein the first processor-specific list is sorted by expiration times of the timer objects associated with the first virtual processor;

inserting, based on the expiration time, creating a first element associated with the particular timer object into the first processor-specific list, wherein the first element references the global element and a second element of a second processor-specific list associated with a second virtual processor implemented by the host computer system that are associated with the timer events provided to the virtual processor;

identifying, using the first processor-specific list, a nearest timer event corresponding to a nearest timer object associated with the first virtual processor; and

executing, by the first virtual processor, guest executable code until the nearest timer event.

16. The non-transitory computer readable medium of claim 15 , the operations further comprising:

receiving a request to remove a particular specified timer object;

removing an element associated with the specified timer object from the global list;

removing a first element associated with the specified timer object from the first processor-specific list;

modifying a pointer of a previous element of the global list to point to a next element of the global list, wherein the previous element precedes the element associated with the specified timer object, and wherein the next element follows the element associated with the specified timer object.

17. The non-transitory computer readable medium of claim 16 , the operations further comprising:

removing a third element associated with the specified timer object from the second processor-specific list.

18. The non-transitory computer readable medium of claim 15 , the operations further comprising:

identifying the first virtual processor based on an affinity mask associated with the particular timer object.

19. The non-transitory computer readable medium of claim 15 , wherein executing the guest code further comprises:

limiting duration of a sleep state of the first virtual processor by the nearest timer event.

20. The non-transitory computer readable medium of claim 15 , wherein the second element of a second processor-specific list is associated with the particular timer object.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jul 18, 2019
From: UBS AG, STAMFORD BRANCH, AS ADMINISTRATIVE AND COLLATERAL AGENT
To: COREL CORPORATION; CLEARSLIDE, INC.; PARALLELS INTERNATIONAL GMBH
Reel/Frame 049787/0073 →
RELEASE OF SECURITY INTEREST RECORDED AT : REEL 047973 FRAME 0797 Recorded Jul 17, 2019
From: UBS AG, STAMFORD BRANCH
To: PARALLELS INTERNATIONAL GMBH
Reel/Frame 049773/0590 →
SECURITY INTEREST Recorded Dec 21, 2018
From: PARALLELS INTERNATIONAL GMBH
To: UBS AG, STAMFORD BRANCH
Reel/Frame 047973/0797 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2017
From: DAVGALEV, MAXIM; DOBROVOLSKIY, NIKOLAY; BELOUSSOV, SERGUEI M.
To: PARALLELS INTERNATIONAL GMBH
Reel/Frame 041138/0683 →
Cited By (1)
US 12,242,876