PWM capacitor control

1. A variable capacitance device comprising:

a capacitor;

a first transistor comprising a first-transistor source terminal, a first-transistor drain terminal, and a first-transistor gate terminal, the first-transistor drain terminal electrically connected to a first terminal of the capacitor;

a second transistor comprising a second-transistor source terminal, a second-transistor drain terminal, and a second-transistor gate terminal, the second-transistor drain terminal electrically connected to a second terminal of the capacitor, and the second-transistor source terminal electrically connected to the first-transistor source terminal; and

control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal,

wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:

detecting a first zero-crossing of an input current at a first time;

after a first delay period from the first time, switching off the first transistor, wherein a length of the first delay period is controlled by an input value;

detecting a second zero-crossing of the input current at a second time, after the first time;

measuring an elapsed time between switching off the first transistor and detecting the second zero-crossing;

setting a counter based on the elapsed time; and

after a second delay period based on the counter, switching on the first transistor.

2. The device of claim 1 , wherein the operations further comprising:

after the first delay period from the second time, switching off the second transistor;

detecting a third zero-crossing of the input current at a third time, after the second time;

measuring a second elapsed time between switching off the second transistor and detecting the third zero-crossing;

setting a second counter based on the second elapsed time; and

after a third delay period based on the second counter, switching on the second transistor.

3. The device of claim 1 , wherein the effective capacitance of the capacitor is controlled by the input value.

4. The device of claim 1 , wherein the input value is a phase delay value, and wherein the first delay period is equal to

φ

360

⁢

°

⁢

T

,

where φ represents the phase delay value and T represents a period of the input current.

5. The device of claim 1 , wherein setting the counter based on the elapsed time comprises setting the counter to the measured elapsed time plus a predetermined delay time.

6. The device of claim 5 , wherein the predetermined time delay less than 800 ns.

7. The device of claim 1 , wherein the first and second transistors are selected from the group consisting of: silicon MOSFET transistors, silicon carbide MOSFET transistors, or gallium nitride MOSFET transistors.

8. A high-voltage impedance matching system comprising the variable capacitance device of claim 1 .

9. A high-power wireless energy transfer system comprising an inductive coil electrically coupled to the variable capacitance device of claim 1 .

10. A variable capacitance device comprising:

a capacitor;

a first transistor comprising a first-transistor source terminal, a first-transistor drain terminal, and a first-transistor gate terminal, the first-transistor drain terminal electrically connected to a first terminal of the capacitor;

a second transistor comprising a second-transistor source terminal, a second-transistor drain terminal, and a second-transistor gate terminal, the second-transistor drain terminal electrically connected to a second terminal of the capacitor, and the second-transistor source terminal electrically connected to the first-transistor source terminal; and

control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal,

wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:

detecting a zero-crossing of an input current at a first time;

switching off the first transistor;

estimating, based on an input value, a first delay period for switching the first transistor on when a voltage across the capacitor is zero;

after the first delay period from the first time, switching on the first transistor;

detecting a zero-crossing of the input current at a second time;

switching off the second transistor;

estimating, based on the input value, a second delay period for switching the second transistor on when a voltage across the capacitor is zero; and

after the second delay period from the second time, switching on the second transistor.

11. The device of claim 10 , wherein the effective capacitance of the capacitor is controlled by the input value.

12. The device of claim 10 , wherein after the first delay period from the first time, switching on the first transistor comprises switching on the first transistor following a fixed time delay after the first delay period from the first time.

13. A high-voltage impedance matching system comprising the variable capacitance device of claim 10 .

14. A high-power wireless energy transfer system comprising an inductive coil electrically coupled to the variable capacitance device of claim 10 .

15. A variable capacitance device comprising:

a capacitor;

a first transistor comprising a first-transistor source terminal, a first-transistor drain terminal, and a first-transistor gate terminal, the first-transistor drain terminal electrically connected to a first terminal of the capacitor;

a second transistor comprising a second-transistor source terminal, a second-transistor drain terminal, and a second-transistor gate terminal, the second-transistor drain terminal electrically connected to a second terminal of the capacitor, and the second-transistor source terminal electrically connected to the first-transistor source terminal; and

control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal,

wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:

switching off the first transistor at a first time;

switching on the first transistor after detecting a current through a first diode associated with the first transistor;

switching off the second transistor at a second time; and

switching on the second transistor after detecting a current through a second diode associated with the second transistor.

16. The device of claim 15 , wherein the first diode is electrically connected in parallel with the first transistor, and wherein the second diode is electrically connected in parallel with the second transistor.

17. The device of claim 15 , wherein the first diode is a body-diode of the first transistor, and wherein the second diode is a body-diode of the second transistor.

18. The device of claim 15 , further comprising a body diode conduction sensor electrically connected to the first transistor and the second transistor.

19. The device of claim 18 , wherein the body diode conduction sensor is coupled to the control circuitry and provides signals indicating a start of body diode conduction through the first diode and through the second diode.

20. The device of claim 18 , wherein the body diode conduction sensor comprises a sense resistor electrically connected between the first transistor and the second transistor.