IP Library Granted Patent US 10,027,291
Granted Patent B2
US 10,027,291 · App. 15/430,890 · Granted Jul 17, 2018

Power amplification circuit

Inventor: Satoshi Goto (Nagaokakyo, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H03F1/565H03F3/195H03F3/21H03F3/245H03F2200/108H03F2200/18H03F2200/222H03F2200/318H03F2200/387H03F2200/411H03F2200/451H03F2200/555
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Quick Facts
Patent No.
US 10,027,291
App. No.
15/430,890
Granted
Jul 17, 2018
Kind
B2
Abstract

A power amplification circuit that includes: a capacitor element in which a first metal layer, a first insulating layer, a second metal layer, a second insulating layer and a third metal layer are sequentially stacked, the capacitor element including a first capacitor in which the first metal layer serves as one electrode thereof and the second metal layer serves as another electrode thereof, and a second capacitor in which the second metal layer serves as one electrode thereof and the third metal layer serves as another electrode thereof; and a transistor that amplifies a radio-frequency signal. The radio-frequency signal is supplied to the one electrode of the first capacitor. The other electrode of the first capacitor and the one electrode of the second capacitor are connected to a base of the transistor, and the other electrode of the second capacitor is connected to the emitter of the transistor.

Claims (18)

1. A power amplification circuit comprising:

a capacitor element in which a first metal layer, a first insulating layer, a second metal layer, a second insulating layer and a third metal layer are sequentially stacked,

the capacitor element including

a first capacitor in which the first metal layer serves as one electrode thereof and the second metal layer serves as another electrode thereof, and

a second capacitor in which the second metal layer serves as one electrode thereof and the third metal layer serves as another electrode thereof;

a bias circuit comprising a bias circuit transistor having an emitter that is connected to the other electrode of the first capacitor and the one electrode of the second capacitor, to provide a bias current to the other electrode of the first capacitor and the one electrode of the second capacitor in response to a bias control voltage;

a transistor that amplifies a radio-frequency signal; and

an output at a collector of the transistor that provides an output radio-frequency signal based on the radio-frequency signal without providing a feedback signal based on the output radio-frequency signal to a base of the transistor;

wherein the radio-frequency signal is supplied to the one electrode of the first capacitor, the other electrode of the first capacitor and the one electrode of the second capacitor are connected to the base of the transistor.

2. The power amplification circuit according to claim 1 ,

wherein the other electrode of the second capacitor is connected to the emitter of the transistor via a through electrode.

3. The power amplification circuit according to claim 1 , wherein

the bias control voltage is supplied to a base of the bias circuit transistor.

4. The power amplification circuit according to claim 3 , wherein

the emitter of the bias circuit transistor is connected to the other electrode of the first capacitor and the one electrode of the second capacitor via a resistor.

5. The power amplification circuit according to claim 4 , wherein

the bias circuit further comprises another resistor connected to the base of the bias circuit transistor, a capacitor that connects the base of the bias circuit transistor to ground, and a diode circuit that connects the base of the bias circuit transistor to ground; and

the bias control voltage is supplied to the base of the bias circuit transistor via the another resistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2017
From: GOTO, SATOSHI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 041238/0583 →
Priority Claims (1)
JP 2016-071197 · Mar 31, 2016 · national
Continuity (1)
Related Publication 20170288616A1 · Oct 5, 2017