IP Library Patent Application 15431682
Patent Application
App. No. 15/431,682

SYSTEMS, METHODS, SOFTWARE, AND COMPONENTS USING TAMPER-PROOF REAL-TIME CLOCK

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Quick Facts
Patent No.
US None
App. No.
15/431,682
Abstract

The write-access control line for an RTC is combined with a clear line for an RTC signature register, so that changes to the RTC will cause subsequent reads to return an invalidity flag.

Claims (29)

1 . A device, comprising:

a real-time clock configured to maintain and provide a system time; and

signature storage having an invalidation control line connected to the real-time clock,

wherein the signature storage includes a digital signature that is compared to a signature input for determining whether the invalidation control line forces the signature storage into an invalid state.

2 . The device of claim 1 , wherein the digital signature is not available as data output.

3 . The device of claim 1 , wherein if the digital signature is equal to the signature input, the signature storage is forced into a valid state.

4 . The device of claim 1 , wherein if the digital signature is not equal to the signature input, the signature storage is forced into an invalid state.

5 . The device of claim 1 , further comprising instruction execution logic operable to execute a plurality of software instructions.

6 . The device of claim 1 , further comprising validation logic to check the digital signature.

7 . The device of claim 1 , wherein the digital signature is generated based on a unique hardware-encoded value.

8 . A method comprising

generating a digital signature for a real-time clock configured to maintain and provide a system time;

storing the digital signature in signature storage having an invalidation control line connected to the real-time clock, and

comparing the digital signature to a signature input for determining whether the invalidation control line forces the signature storage into an invalid state.

9 . The method of claim 8 , wherein the digital signature is not available as data output.

10 . The method of claim 8 , wherein if the digital signature is equal to the signature input, the signature storage is forced into a valid state.

11 . The method of claim 8 , wherein if the digital signature is not equal to the signature input, the signature storage is forced into an invalid state.

13 . The method of claim 8 , wherein the comparing is performed via validation logic.

14 . The method of claim 8 , wherein the digital signature is generated based on a unique hardware-encoded value.

14 . The method of claim 8 , wherein the digital signature is generated based on a real-time clock value.

15 . A non-transitory computer readable medium comprising instructions for:

generating a digital signature for a real-time clock configured to maintain and provide a system time;

storing the digital signature in signature storage having an invalidation control line connected to the real-time clock, and

comparing the digital signature to a signature input for determining whether the invalidation control line forces the signature storage into an invalid state.

16 . The non-transitory computer readable medium of claim 15 , wherein the digital signature is not available as data output.

17 . The non-transitory computer readable medium of claim 15 , wherein if the digital signature is equal to the signature input, the signature storage is forced into a valid state.

18 . The non-transitory computer readable medium of claim 15 , wherein if the digital signature is not equal to the signature input, the signature storage is forced into an invalid state.

19 . The non-transitory computer readable medium of claim 15 , wherein the digital signature is generated based on a unique hardware-encoded value.

20 . The non-transitory computer readable medium of claim 15 , wherein the digital signature is generated based on a real-time clock value.