Synchronized switching of voltage regulators in an information handling system
View Patent ↗A method and system for synchronized switching of voltage regulators in an IHS. The method includes determining, via a master voltage regulator (VR) controller, a plurality of phase shifts for a plurality of VRs configured as a master VR and at least one slave VR. The phase shifts are determined such that the VRs switch at different times from each other. A common clock signal and the phase shifts are transmitted to each of the slave VRs.
1. A method for synchronized switching of voltage regulators (VR(s)) in an information handling system (IHS), the method comprising:
receiving, at a master VR controller, from a non-volatile (NV) memory of a board management controller (BMC), master/slave configuration data to each of a plurality of VRs via a digital communication interface and clock signal/phase data via a common clock bus, the master/slave configuration data identifying one of the plurality of VRs as a master VR and each other VR as a slave VR, the master slave configuration data assigning, as the master VR, the one VR identified by the master/slave configuration data as the master VR;
determining, via the master VR controller of the VR assigned as the master VR, a plurality of switching frequencies and associated phase shifts for the plurality of VRs configured as the master VR and at least one slave VR, the phase shifts determined such that each of the plurality of VRs switch at different times from each other; and
transmitting, to each of the slave VRs, from the master VR controller, the associated phase shifts.
2. The method of claim 1 , further comprising:
assigning slave VRs identified by the master/slave configuration data as the slave VRs.
3. The method of claim 1 , further comprising:
receiving, via a first slave VR controller, a first phase shift for a first slave VR;
determining, via the first slave VR controller, a first switching frequency for the first slave VR; and
operating the first slave VR at the first switching frequency and first phase shift.
4. The method of claim 1 , further comprising transmitting, from the master VR controller through a common clock bus, a common clock signal to each of the slave VRs.
5. The method of claim 1 , further comprising:
determining, via a first slave VR controller associated with a first slave VR, if a common clock signal has failed; and
in response to the common clock signal having failed, self-assigning the first slave VR as a new master VR.
6. The method of claim 1 , wherein the transmitting comprises transmitting the switching frequencies and associated phase shifts through a digital communication interface interconnecting the master VR and each of the at least one slave VR, the digital communication interface being separate from the common clock bus.
7. A power control system comprising:
a power subsystem configured to be coupled to and supply power to functional components of an information handling system (IHS), the power subsystem including a master voltage regulator (VR), at least one slave VR, and a board management controller (BMC), the master VR communicatively coupled to each of the at least one slave VR and the BMC via both a common clock bus and a digital communication interface, the master VR further including a master VR controller, the master VR controller having VR synchronization firmware executing thereon that configures the master VR controller to:
receive, from a non-volatile (NV) memory of the BMC, master/slave configuration data for one or more of the plurality of VRs via the digital communication interface and clock signal/phase data via a common clock bus, the master/slave configuration data identifying one of the plurality of VRs as a master VR and each other VR as a slave VR, and the master VR controller assigning, as the master VR, the one VR identified by the master/slave configuration data as the master VR;
determine a plurality of switching frequencies and associated phase shifts for the plurality of VRs comprising the master VR and the at least one slave VR, the switching frequencies and associated phase shifts determined such that each of the plurality of VRs switch at different times from each other; and
transmit, to each of the slave VRs from the master VR controller, the associated phase shifts.
8. The power control system of claim 7 , wherein the VR synchronization firmware further configures the master VR controller to:
assign slave VRs identified by the master/slave configuration data as the slave VRs; and
transmit slave assignments to at least one of the VRs to assign the VR as a slave VR.
9. The power control system of claim 7 , wherein a first slave VR includes a first VR controller, the first VR controller configured to:
receive a first phase shift for the first slave VR;
determine a first switching frequency for the first slave VR; and
operate the first slave VR at the first switching frequency and the first phase shift.
10. The power control system of claim 7 , wherein the VR synchronization firmware further configures the master VR controller to transmit, via a common clock bus, a common clock signal to each of the slave VRs.
11. The power control system of claim 7 , wherein a first slave VR controller associated with a first slave VR operates to:
determine if a common clock signal has failed; and
in response to the common clock signal having failed, self-assigning the first slave VR as a new master VR.
12. An information handling system (IHS) comprising:
at least one processor; and
a power subsystem communicatively coupled to the processor and to functional components of the IHS, the power subsystem including a master voltage regulator (VR), at least one slave VR, and a board management controller (BMC), the master VR communicatively coupled to the at least one slave VR and the BMC, the master VR further including a master VR controller, the master VR controller having VR synchronization firmware executing thereon that configures the master VR controller to:
receive, from a non-volatile (NV) memory of the BMC, master/slave configuration data for one or more of the plurality of VRs via a digital communication interface and clock signal/phase data via a common clock bus, the master/slave configuration data identifying one of the plurality of VRs as a master VR and each other VR as a slave VR, and the master VR controller assigning, as the master VR, the one VR identified by the master/slave configuration data as the master VR;
determine a plurality of switching frequencies and associated phase shifts for the plurality of VRs comprising the master VR and the at least one slave VR, the switching frequencies and associated phase shifts determined such that each of the plurality of VRs switch at different times from each other; and
transmit, to each of the slave VRs from the master VR controller, the associated phase shifts.
13. The information handling system of claim 12 , wherein the VR synchronization firmware further configures the master VR controller to:
assign slave VRs identified by the master/slave configuration data as the slave VRs; and
transmit slave assignments to at least one of the VRs to assign the VR as a slave VR.
14. The information handling system of claim 12 , wherein a first slave VR includes a first VR controller, the first VR controller configured to:
receive a first phase shift for the first slave VR;
determine a first switching frequency for the first slave VR; and
operate the first slave VR at the first switching frequency and the first phase shift.
15. The information handling system of claim 12 , wherein the VR synchronization firmware further configures the master VR controller to transmit a common clock signal, via a common clock bus, to each of the slave VRs.
16. The information handling system of claim 12 , wherein a first slave VR controller associated with a first slave VR operates to:
determine if a common clock signal has failed; and
in response to the common clock signal having failed, self-assigning the first slave VR as a new master VR.