IP Library Granted Patent US 10,289,421
Granted Patent B2
US 10,289,421 · App. 15/436,727 · Granted May 14, 2019

Booting of IHS from SSD using PCIe

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Quick Facts
Patent No.
US 10,289,421
App. No.
15/436,727
Granted
May 14, 2019
Kind
B2
Abstract

Methods and systems are provided for initializing a host IHS (Information Handling System) that includes an SSD (solid state storage device) connected using PCIe (Peripheral Component Interconnect Express). The SSD detects the transfer of boot data from the host to the persistent storage of the SSD. The SSD marks the detected boot data for pre-fetching. When the host is booted, memory is allocated for the PCIe connection. During the resulting delay, the SSD pre-fetches the marked boot data from persistent storage to a portion of a volatile memory used by the SSD for storing a mapping of the boot data in persistent storage. Upon configuring the PCIe connection, the SSD is provides pre-fetched boot data to the host immediately, thus improving boot times. In certain scenarios, the SSD pre-fetches successive portions of the boot data and provides each pre-fetched portion of the boot data to the host.

Claims (56)

1. A method for initializing a host IHS (Information Handling System) comprising a solid state storage device, the method comprising:

initializing a PCIe (Peripheral Component Interconnect Express) connection between the host IHS and the solid state storage device;

allocating a host memory on the host IHS, wherein the allocated host memory supports data transfers via the PCIe connection with the solid state storage device;

loading a first set of mappings in a first portion of a volatile memory of the solid state storage device, wherein the first set of mappings identifies a location of operating system boot data in a persistent storage of the solid state storage device;

pre-fetching at least a first portion of the operating system boot data, wherein the at least first portion of the operating system boot data is pre-fetched during at least a portion of a time required for the host memory to be allocated, and wherein pre-fetching the at least first portion of the operating system boot data comprises using the first set of mappings to identify the location of the at least first portion of the operating system boot data in persistent storage and copying the at least first portion of the located operating system boot data from the persistent storage to a second portion of the volatile memory of the solid state storage device;

transmitting the pre-fetched at least first portion of the operating system boot data to the host IHS; and

booting the host IHS from the pre-fetched at least first portion of the operating system boot data.

2. The method of claim 1 , wherein the PCIe connection utilizes NVMe (Non-Volatile Memory Express) and wherein the host memory is allocated for use as a plurality of NVMe queues.

3. The method of claim 1 , wherein the first set of mappings is a set of FTL (Flash Translation Layer) mappings that encode the location of data in the persistent storage of the solid state storage device.

4. The method of claim 3 , further comprising:

detecting an end of session command issued by the host IHS; and

identifying the location of the operating system boot data stored in the persistent storage of the solid state storage device, wherein the operating system boot data is located by determining a last block of data received for storage from the host IHS prior to the detected end of session command.

5. The method of claim 4 , further comprising:

determining the first set of mappings corresponding to the location of the identified last block of data in the persistent storage; and

storing the first set of mappings to a predefined location in persistent storage of the solid state storage device.

6. The method of claim 1 , wherein a size of the located operating system boot data in persistent storage is greater than a size of the second portion of the volatile memory of the solid state storage device.

7. The method of claim 6 , further comprising:

pre-fetching a second portion of the located operating system boot data, wherein the second portion of the located operating system boot data is pre-fetched after the prefetched first portion of the operating system boot data has been transmitted to the host IHS, and wherein pre-fetching the second portion of the operating system boot data comprises transferring the second portion of the operating system boot data from the persistent storage to the second portion of a volatile memory of the solid state storage device.

8. The method of claim 7 , further comprising:

transmitting the pre-fetched second portion of the operating system boot data to the host IHS; and

booting the host IHS from the pre-fetched first portion of the operating system boot data and the pre-fetched second portion of the operating system boot data.

9. A host IHS (Information Handling System) comprising:

a host memory allocated to support data transfers via a PCIe (Peripheral Component Interconnect Express) connection to a solid state storage device;

the solid state storage device comprising a PCIe bus interface connection, a persistent storage, a volatile memory, and a controller, wherein the controller is configured to:

load a first set of mappings in a first portion of the volatile memory, wherein the first set of mappings identifies a location of operating system boot data in the persistent storage;

pre-fetch at least a first portion of the operating system boot data, wherein the at least first portion of the operating system boot data is pre-fetched during at least a portion of a time required for the host memory to be allocated, and wherein pre-fetching the at least first portion of the operating system boot data comprises using the first set of mappings to identify the location of the at least first portion of the operating system boot data in persistent storage and copying the at least first portion of the located operating system boot data from the persistent storage to a second portion of the volatile memory; and

transmit the pre-fetched at least first portion of the operating system boot data to the host IHS via the PCIe bus interface connection; and

a processor configured to boot the host IHS from the pre-fetched at least first portion of the operating system boot data transmitted by the solid state storage device.

10. The IHS of claim 9 , wherein the PCIe connection utilizes NVMe (Non-Volatile Memory Express) and wherein the host memory is allocated for use as a plurality of NVMe queues.

11. The IHS of claim 9 , wherein the first set of mappings is a set of FTL (Flash Translation Layer) mappings that encode the location of data in the persistent storage.

12. The IHS of claim 11 , wherein the controller is further configured to:

detect an end session command issued by the host IHS; and

identify the location of operating system boot data stored in the persistent storage of the solid state storage device, wherein the operating system boot data is located by determining the last block of data received for storage from the host IHS prior to the detected end of session command.

13. The IHS of claim 12 , wherein the controller is further configured to:

determine the first set of mappings corresponding to the location of the identified last block of data in the persistent storage; and

store the first set of mappings to a predefined location in persistent storage of the solid state storage device.

14. The IHS of claim 9 , wherein a size of the located operating system boot data in persistent storage is greater than a size of the second portion of the volatile memory.

15. The IHS of claim 14 , wherein the controller is further configured to:

pre-fetch a second portion of the located operating system boot data, wherein the second portion of the located operating system boot data is pre-fetched after the prefetched first portion of the operating system boot data has been transmitted to the host IHS, and wherein pre-fetching the second portion of the operating system boot data comprises transferring the second portion of the operating system boot data from the persistent storage to the second portion of a volatile memory.

16. A solid state storage device comprising:

a PCIe bus interface connection (Peripheral Component Interconnect Express) to a host IHS, wherein the host IHS includes a host memory allocated to support data transfers via the PCIe connection to the solid state storage device;

a persistent storage;

a volatile memory;

and a controller, wherein the controller is configured to:

load a first set of mappings in a first portion of the volatile memory, wherein the first set of mappings identifies a location of operating system boot data in the persistent storage;

pre-fetch at least a first portion of the operating system boot data, wherein the at least first portion of the operating system boot data is pre-fetched during at least a portion of a time required for the host memory to be allocated, and wherein pre-fetching the at least first portion of the operating system boot data comprises using the first set of mappings to identify the location of the at least first portion of the operating system boot data in persistent storage and copying the at least first portion of the located operating system boot data from the persistent storage to a second portion of the volatile memory; and

transmit the pre-fetched at least first portion of the operating system boot data to the host IHS via the PCIe bus interface connection, wherein the host HIS is configured to boot from the pre-fetched at least first portion of the operating system boot data.

17. The solid state storage device of claim 16 , wherein the controller is further configured to:

detect an end session command issued by the host IHS; and

identify the location of operating system boot data stored in the persistent storage of the solid state storage device, wherein the operating system boot data is located by determining the last block of data received for storage from the host IHS prior to the detected end of session command.

18. The solid state storage device of claim 17 , wherein the controller is further configured to:

determine the first set of mappings corresponding to the location of the identified last block of data in the persistent storage; and

store the first set of mappings to a predefined location in persistent storage of the solid state storage device.

19. The solid state storage device of claim 16 , wherein a size of the located operating system boot data in persistent storage is greater than a size of the second portion of the volatile memory.

20. The solid state storage device of claim 19 , wherein the controller is further configured to:

pre-fetch a second portion of the located operating system boot data, wherein the second portion of the located operating system boot data is pre-fetched after the prefetched first portion of the operating system boot data has been transmitted to the host IHS, and wherein pre-fetching the second portion of the operating system boot data comprises transferring the second portion of the operating system boot data from the persistent storage to the second portion of a volatile memory.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (042769/0001) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0802 →
RELEASE OF SECURITY INTEREST AT REEL 042768 FRAME 0585 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058297/0536 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY INTEREST (CREDIT) Recorded Jun 12, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 042768/0585 →
PATENT SECURITY INTEREST (NOTES) Recorded Jun 12, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 042769/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2017
From: JANG, YOUNG HWAN; KAN, SIMON
To: DELL PRODUCTS, L.P.
Reel/Frame 041290/0814 →