Method of forming a semiconductor device

1. A method of forming a semiconductor device including a diode having a high forward voltage comprising:

providing a semiconductor substrate;

forming a gallium nitride channel layer overlying a first portion of the semiconductor substrate;

forming an aluminum gallium nitride carrier supply layer on the gallium nitride channel layer wherein a 2DEG region is formed near an interface between the gallium nitride channel layer and the aluminum gallium nitride carrier supply layer;

forming a metal cathode on a first portion of the aluminum gallium nitride carrier supply layer;

forming a first P-type GaN layer on a second portion of the aluminum gallium nitride carrier supply layer wherein the first P-type GaN layer is spaced a first distance from the metal cathode;

forming an insulator positioned between the first P-type GaN layer and the metal cathode;

forming a metal anode overlying and electrically connected to the first P-type GaN layer;

forming a control element as a P-type gallium nitride material on the aluminum gallium nitride carrier supply layer wherein the control element is electrically coupled to the first P-type GaN layer including forming the control element a second distance from the first P-type GaN layer and separated from the metal cathode by a third distance wherein the second distance is less than the first distance and wherein a width of the control element is less than a width of the first P-type GaN layer and wherein the control element inhibits formation of the 2DEG underlying the control element and the first P-type GaN layer inhibits formation of the 2DEG underlying the first P-type GaN layer but the 2DEG is formed underlying the third distance between the first P-type GaN layer and the control element.

2. The method of claim 1 further including forming an HEM transistor overlying a second portion of the semiconductor substrate including forming a first isolation region surrounding an outside of the HEM transistor to electrically isolate the HEM transistor from electron flow through the semiconductor substrate between the HEM transistor and the diode having the high forward voltage.

3. The method of claim 2 further including connecting the metal anode of the high voltage diode to one of a gate electrode or a drain electrode of the HEM transistor via a direct electrical connection, and connecting a source electrode of the HEM transistor to the metal cathode of the high voltage diode via a direct electrical connection.

4. The method of claim 3 wherein forming the HEM transistor includes forming the HEM transistor to have a Vgs turn-on threshold value and a Vgs breakdown voltage; and further including forming the diode as a HEM diode having the high forward voltage to have a forward turn-on voltage that is greater than the Vgs turn-on threshold value and less than the Vgs breakdown voltage.

5. The method of claim 1 further including forming a second P-type GaN layer extending from the first P-type GaN layer to the control element semiconductor material wherein the second P-type GaN layer forms the electrical coupling between the first P-type GaN layer and the control element semiconductor material.

6. The method of claim 5 further including forming the second P-type GaN layer to extend laterally from the first P-type GaN layer to abut and form an electrical connection to the control element semiconductor material.

7. The method of claim 5 including forming the second P-type GaN layer to have a thickness that is less than a thickness of the P-type GaN layer and less than a thickness of control element.

8. The method of claim 1 wherein forming the control element semiconductor material includes forming a plurality of control element semiconductor materials on the aluminum gallium nitride carrier supply layer wherein each control element semiconductor material is spaced further from the first P-type GaN layer than an adjacent one of the plurality of control element semiconductor materials.

9. The method of claim 8 further including forming a second P-type GaN layer extending laterally from the first P-type GaN layer to abut and form an electrical connection to each of the plurality of control element semiconductor materials.

10. The method of claim 1 further including forming an insulator positioned between the first P-type GaN layer and the control element wherein the third distance forms a space between the first P-type GaN layer and the control element, and wherein the insulator is within the space.

11. The method of claim 1 including forming the control element in contact with the aluminum gallium nitride carrier supply layer.

12. A method of forming a semiconductor device comprising:

forming a HEM diode and a HEMT on a substrate including forming the HEM diode to have a forward voltage that is greater than a gate-to-source threshold voltage of the HEMT and less than a gate-to-source breakdown voltage of the HEMT; and

forming a control element of the HEM diode positioned a distance laterally between an anode of the HEM diode and a cathode of the HEM diode, the control element spaced laterally apart from the anode wherein the control element inhibits forming a 2DEG region underlying the control element and the 2DEG region is formed underlying a region adjacent to the control element wherein the region adjacent to the control element is positioned laterally between the anode and the control element.

13. The method of claim 12 wherein forming the HEM diode includes forming the anode of the HEM diode coupled to a gate electrode of the HEMT and forming the cathode of the HEM diode connected to a source of the HEMT.

14. The method of claim 12 wherein forming the HEM diode includes forming the control element not underlying the anode wherein the distance forms a desired value for the forward voltage.

15. A method of forming a semiconductor device comprising:

providing a substrate;

forming a HEM diode and a HEMT on the substrate including forming the HEM diode to have a forward voltage that is either greater than a gate-to-source threshold voltage of the HEMT or less than a gate-to-source breakdown voltage of the HEMT;

forming a first semiconductor layer from a group III or group V semiconductor material wherein the first semiconductor layer forms a 2DEG with an underlying second semiconductor layer;

forming a cathode electrode on a first portion of the first semiconductor layer;

forming a third semiconductor layer from another group III or group V semiconductor material as a first semiconductor material, including forming the third semiconductor layer on a second portion of the first semiconductor layer wherein the third semiconductor layer is spaced a first distance from the cathode electrode;

forming an anode electrode of the diode on the third semiconductor layer;

forming a control element as a second semiconductor material positioned laterally between the third semiconductor layer and the cathode electrode and electrically connected to the third semiconductor layer wherein a space is positioned between the control element and the third semiconductor layer and wherein the second semiconductor material forms a P-N junction with the first semiconductor layer, the third semiconductor layer inhibits formation of the 2DEG underlying the third semiconductor layer, the control element inhibits formation of the 2DEG underlying the control element, and the 2DEG is formed underlying the space.

16. The method of claim 15 including forming the cathode electrode directly on the first portion of the first semiconductor layer.

17. The method of claim 16 including forming the diode to be devoid of a P-type material between the cathode electrode and the first portion of the first semiconductor layer.

18. The method of claim 15 wherein forming the first semiconductor layer includes forming a layer of AlGaN.

19. The method of claim 15 further including forming a third semiconductor material extending from the third semiconductor layer to abut and electrically connect to the second semiconductor material of the control element including forming a thickness of the third semiconductor material to be less than a thickness of the third semiconductor layer.

20. The method of claim 15 wherein forming the control element includes forming the control element directly on the first semiconductor layer.