IP Library Granted Patent US 10,141,329
Granted Patent B2
US 10,141,329 · App. 15/440,025 · Granted Nov 27, 2018

Method for manufacturing semiconductor memory device and semiconductor memory device

Inventors: Hirotaka Tsuda (Tokyo, JP); Yusuke Oshiki (Mie, JP)
Assignee: Toshiba Memory Corporation
H01L27/11582H01L21/0217H01L21/02164H01L21/31111H01L21/31116H01L27/11565H01L29/66833H01L29/7926H01L21/31144
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Quick Facts
Patent No.
US 10,141,329
App. No.
15/440,025
Granted
Nov 27, 2018
Kind
B2
Abstract

According to one embodiment, a method for manufacturing a semiconductor memory device includes simultaneously forming a plurality of first holes and a plurality of second holes in a stacked body. The stacked body includes a plurality of first layers and a plurality of second layers. The method includes etching a portion between the second holes next to each other in the stacked body, and connecting at least two or more second holes to form a groove. The method includes forming a film including a charge storage film on a sidewall of the first holes. The method includes forming a channel film on a sidewall of the film including the charge storage film.

Claims (19)

1. A method for manufacturing a semiconductor memory device, comprising:

forming, in a stacked body including a plurality of first layers and a plurality of second layers each of which is provided between the first layers, a plurality of first holes and a plurality of second holes in which a channel film is to be formed inside the first holes, the first holes and the second holes extending through the stacked body in a stacking direction of the stacked body and being arrayed in a first direction intersecting the stacking direction and in a direction oblique to the first direction;

etching a portion between the second holes next to each other in the stacked body to connect the second holes next to each other in the first direction and the second holes next to each other in the direction oblique to the first direction via the etched portion and form a trench in the stacked body.

2. The method according to claim 1 , wherein etching a portion between the second holes is performed by a dry etching method.

3. The method according to claim 1 , wherein etching a portion between the second holes is performed by an isotropic etching.

4. The method according to claim 1 , wherein etching a portion between the second holes is performed to connect two second holes next to each other regarding the direction oblique to the first direction.

5. The method according to claim 1 , wherein a minimum width of the trench is larger than a diameter of the first holes.

6. The method according to claim 1 , wherein the trench separates the stacked body in a direction orthogonal to the first direction.

7. The method according to claim 6 , further comprising:

forming a plurality of wiring lines electrically connected to the channel film and extending in the direction orthogonal to the first direction above the stacked body.

8. The method according to claim 6 , further comprising:

separating an uppermost layer of the stacked body in the direction orthogonal to the first direction at a region different from the trench.

9. The method according to claim 1 , wherein the first holes and the second holes are arrayed in a houndstooth pattern in the stacked body.

10. The method according to claim 1 , wherein a diameter of the first holes and a diameter of the second holes are substantially equal to each other.

11. The method according to claim 1 , wherein etching a portion between the second holes is performed to connect the second holes by increasing a hole diameter of the second holes.

12. The method according to claim 1 , further comprising:

alternately stacking a plurality of conductive layers as the first layers and a plurality of insulating layers as the second layers to form the stacked body.

13. The method according to claim 1 , further comprising:

forming the channel film in a cylindrical shape inside the first holes.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE POSTAL CODE PREVIOUSLY RECORDED ON REEL 042910 FRAME 0321. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043747/0290 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 042910/0321 →
Priority Claims (1)
JP 2014-221032 · Oct 30, 2014 · national
Continuity (2)
Division 14639084 · Mar 4, 2015
Related Publication 20170162596A1 · Jun 8, 2017
Cited By (2)
US 12,219,761 US 12,402,316