IP Library Granted Patent US 9,997,470
Granted Patent B2
US 9,997,470 · App. 15/441,465 · Granted Jun 12, 2018

Semiconductor device and manufacturing method thereof

Inventors: Masaji Iwamoto (Kanagawa, JP); Takashi Yamazaki (Kanagawa, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L23/552H01L21/56H01L23/50H01L24/48H01L24/49H01L2224/48095H01L2224/48175H01L2224/49176
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Quick Facts
Patent No.
US 9,997,470
App. No.
15/441,465
Granted
Jun 12, 2018
Kind
B2
Abstract

Embodiments include a semiconductor manufacturing method comprising, providing an object to be processed, the object including a semiconductor element, a sealing resin layer sealing the semiconductor element, a ground terminal electrically connected to the semiconductor element and including a first protruding part protruding through a surface of the resin layer, and a signal terminal electrically connected to the semiconductor element and including a second protruding part protruding through the surface of the resin layer; positioning the object in a jig, wherein the jig covers the entire second protruding part of the signal terminal, and wherein the jig only partially covers the first protruding part of the ground terminal, such that at least a first portion of the first protruding part of the ground terminal is left uncovered by the jig; while the object is positioned in the jig, fabricating a conductive shield layer on the resin layer and at least some of the first portion of the first protruding part of the ground terminal, such that the shield layer is electrically connected to ground terminal.

Claims (36)

1. A semiconductor manufacturing method comprising: placing an object to be processed into a jig, the object comprising a semiconductor element, a sealing resin layer sealing the semiconductor element, a ground terminal electrically connected to the semiconductor element and protruding through a surface of the sealing resin layer, and a signal terminal electrically connected to the semiconductor element and protruding through the surface of the sealing resin layer, the jig comprising a top surface, a side surface, a first trench exposed continuously from the top surface to the side surface and a second trench exposed in the top surface and not exposed in the side surface, fabricating a conductive shield layer on the resin layer and on a part of the ground terminal, the conductive layer electrically connected to ground terminal, wherein, during the fabricating, the ground terminal is inserted into the first trench, the signal terminal is inserted into the second trench, and the surface of the sealing resin layer contacts the top surface of the jig.

2. The semiconductor manufacturing method according to claim 1 , further comprising:

forming the object before the placing, the forming comprising

mounting the semiconductor element on a substrate, electrically connecting the semiconductor element to the ground terminal and the signal terminal, respectively,

fabricating the sealing resin layer to seal the semiconductor element, a connection portion between the semiconductor element and the ground terminal, and a connection portion between the semiconductor element and the signal terminal, and

plating a protruding portion of the ground terminal and a protruding portion of the signal terminal.

3. The semiconductor manufacturing method according to claim 2 , wherein the conductive shield layer is fabricated by one of a sputtering method, a spray method, an evaporation method or a plating method.

4. The semiconductor manufacturing method according to claim 1 , wherein the conductive shield layer is fabricated by one of a sputtering method, a spray method, an evaporation method or a plating method.

5. The semiconductor manufacturing method according to claim 1 , wherein the semiconductor element is single line package type.

6. The semiconductor manufacturing method according to claim 1 , wherein the jig further comprises additional three side surfaces and the first trench does not expose the additional three side surfaces.

7. A semiconductor device comprising:

a semiconductor element,

a sealing resin layer sealing the semiconductor element;

a ground terminal electrically connected to the semiconductor element and protruding from a surface of the sealing resin layer;

a signal terminal electrically connected to the semiconductor element and protruding from the surface of the sealing resin layer; and

a conductive shield layer substantially covering an outside surface of the sealing resin layer and a part of the ground terminal.

8. A semiconductor manufacturing method comprising:

providing an object to be processed, the object including

a semiconductor element,

a sealing resin layer sealing the semiconductor element,

a ground terminal electrically connected to the semiconductor element and including a first protruding part protruding through a surface of the resin layer, and

a signal terminal electrically connected to the semiconductor element and including a second protruding part protruding through the surface of the resin layer;

positioning the object in a jig, wherein the jig covers the entire second protruding part of the signal terminal, and wherein the jig only partially covers the first protruding part of the ground terminal, such that at least a first portion of the first protruding part of the ground terminal is left uncovered by the jig;

while the object is positioned in the jig, fabricating a conductive shield layer on the resin layer and at least some of the first portion of the first protruding part of the ground terminal, such that the shield layer is electrically connected to ground terminal.

9. The semiconductor manufacturing method according to claim 8 , further comprising:

forming the object before the placing, the forming including

mounting the semiconductor element on a substrate,

electrically connecting the semiconductor element to the ground terminal and the signal terminal, respectively,

fabricating the sealing resin layer sealing the semiconductor element, a connection portion between the semiconductor element and the ground terminal, and a connection portion between the semiconductor element and the signal terminal, and

plating a protruding portion of the ground terminal and a protruding portion of the signal terminal.

10. The semiconductor manufacturing method according to claim 8 , wherein the conductive shield layer is fabricated by one of a sputtering method, a spray method, an evaporation method or a plating method.

11. The semiconductor manufacturing method according to claim 9 , wherein the conductive shield layer is fabricated by one of a sputtering method, a spray method, an evaporation method or a plating method.

12. The semiconductor manufacturing method according to claim 8 , wherein the semiconductor element is single line package type.

13. The semiconductor manufacturing method according to claim 8 , wherein the jig comprises a top surface, a side surface, a first trench exposing continuously from the top surface to the side surface, and a second trench exposed in the top surface and not exposed in the side surface.

14. The semiconductor manufacturing method according to claim 8 , wherein the conductive shield layer only partially covers the first portion of the first protruding part of the ground terminal.

15. The semiconductor manufacturing method according to claim 14 , further comprising forming a protective layer covering the conductive shield layer at least where the conductive shield layer is fabricated on the resin layer and the at least some of the first portion of the first protruding part of the ground terminal.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043063/0178 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2017
From: IWAMOTO, MASAJI; YAMAZAKI, TAKASHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 041752/0899 →
Priority Claims (1)
JP 2016-053322 · Mar 17, 2016 · national
Continuity (1)
Related Publication 20170271271A1 · Sep 21, 2017