Methodology for model-based self-aligned via awareness in optical proximity correction
A method of providing self-aligned via (SAV) awareness in optical proximity correction (OPC) includes identifying non-SAV edges, identifying any lower metal structure that is within a critical distance from the non-SAV edges, and defining replacement non-SAV edges proximate to the lower metal structure using a distance constraint that is evaluated as part of the OPC objective function to redefine the mask solution and relocate at least one non-SAV edge away from the lower metal structure.
1. A method of forming a photolithography mask for integrated circuit manufacture comprising:
providing a mask layout for an integrated circuit using a mask layout method, the mask layout method implemented by a computer program stored in a computer readable non-transient storage medium, the mask layout method comprising:
defining a mask layout corresponding to a self-aligned via, the mask layout comprising an outer via contour;
creating a lithographic model for the self-aligned via, the model describing processes by which an image is transferred from the mask to a substrate;
determining a simulated substrate image resulting from transferring the mask layout in accordance with the model;
evaluating the simulated substrate image subject to functional constraints relative to a metal layer disposed over the substrate, the functional constraints including a condition that the outer via contour is separated from the metal layer by a distance that ensures that a metal disposed within the via is electrically isolated from the metal layer;
if the constraints are violated, modifying the mask layout to increase a distance between the outer via contour and the metal layer; outputting the mask layout; and
forming, from the outputted mask layout, a photolithography mask for integrated circuit manufacture.
2. The method of claim 1 , wherein the outer via contour comprises self-aligned via edges and non-self-aligned via edges.
3. The method of claim 1 , wherein the mask layout is modified to increase the distance between a non-self-aligned via edge and the metal layer.
4. The method of claim 3 , wherein the mask layout is modified to increase a distance between a second non-self-aligned via edge and a second metal layer.
5. The method of claim 1 , wherein the mask layout is modified to increase the distance between a non-self-aligned via edge and the metal layer without increasing a distance between a self-aligned via edge and the metal layer.
6. The method of claim 1 , wherein modifying the mask layout comprises dividing the outer via contour into a plurality of segments.
7. The method of claim 1 , wherein modifying the mask layout comprises performing an OPC convergence simulation.
8. The method of claim 1 further comprising using the photolithographic mask to manufacture an integrated circuit.
9. A computer program product for forming a photolithography mask for integrated circuit manufacture, the computer program product comprising a non-transitory computer readable storage medium having a computer readable program embodied in the medium for providing a mask layout for an integrated circuit, wherein the computer readable program when executed on a computer causes the computer to perform the steps of:
defining a mask layout corresponding to a self-aligned via, the mask layout comprising an outer via contour;
creating a lithographic model for the self-aligned via, the model describing processes by which an image is transferred from the mask to a substrate;
determining a simulated substrate image resulting from transferring the mask layout in accordance with the model;
evaluating the simulated substrate image subject to functional constraints relative to a metal layer disposed over the substrate, the functional constraints including a condition that the outer via contour is separated from the metal layer by a distance that ensures that a metal disposed within the via is electrically isolated from the metal layer; and
if the constraints are violated, modifying the mask layout to increase a distance between the outer via contour and the metal layer.
10. The computer program product of claim 9 , wherein the outer via contour comprises self-aligned via edges and non-self-aligned via edges.
11. The computer program product of claim 9 , wherein the mask layout is modified to increase the distance between a non-self-aligned via edge and the metal layer.
12. The computer program product of claim 11 , wherein the mask layout is modified to increase a distance between a second non-self-aligned via edge and a second metal layer.
13. The computer program product of claim 9 , wherein the mask layout is modified to increase the distance between a non-self-aligned via edge and the metal layer without increasing a distance between a self-aligned via edge and the metal layer.
14. The computer program product of claim 9 , wherein modifying the mask layout comprises dividing the outer via contour into a plurality of segments.
15. The computer program product of claim 9 , wherein modifying the mask layout comprises includes performing an OPC convergence simulation.
16. The computer program product of claim 9 further comprising outputting the mask layout for manufacture of a photolithography mask for integrated circuit manufacture.