IP Library Granted Patent US 10,102,071
Granted Patent B2
US 10,102,071 · App. 15/448,273 · Granted Oct 16, 2018

Storage device that restores data lost during a subsequent data write

Inventors: Katsuya Ohno (Yokohama, Kanagawa, JP); Konosuke Watanabe (Kawasaki, Kanagawa, JP); Kenta Yasufuku (Yokohama, Kanagawa, JP)
Assignee: TOSHIBA MEMORY CORPORATION
G06F11/108G06F11/1096G11C16/0483
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Quick Facts
Patent No.
US 10,102,071
App. No.
15/448,273
Granted
Oct 16, 2018
Kind
B2
Abstract

A storage device includes a plurality of nonvolatile memories each of which includes first memory cells connected to a first word line and second memory cells connected to a second word line that is adjacent to the first word line, and a controller. The controller is configured to maintain parity data for data written in the first memory cells of the nonvolatile memories, and when carrying out data writing in the second memory cells connected to the second word line in a targeted nonvolatile memory, which is one of the plurality of nonvolatile memories, upon detecting a failure in the data writing therein, carrying out restoration of data that were written in the first memory cells of the targeted nonvolatile memory using the parity data.

Claims (56)

1. A storage device comprising:

a plurality of nonvolatile memories each of which includes first memory cells connected to a first word line and second memory cells connected to a second word line that is different from and adjacent to the first word line; and

a controller configured to

maintain parity data for data written in the first memory cells of the nonvolatile memories, and

when carrying out data writing in the second memory cells connected to the second word line in a targeted nonvolatile memory, which is one of the plurality of nonvolatile memories, upon detecting a failure in the data writing therein, carry out restoration of data that were written in the first memory cells of the targeted nonvolatile memory using the parity data.

2. The storage device according to claim 1 , wherein

the controller is configured to carry out the restoration also using data that were written in the first memory cells of the plurality of nonvolatile memories other than the targeted nonvolatile memory.

3. The storage device according to claim 1 , wherein

the controller is further configured to write data restored through the restoration in memory cells connected to a third word line different from the first and second word lines in the targeted nonvolatile memory.

4. The storage device according to claim 1 , wherein

the controller is further configured to generate the parity data by performing an exclusive OR operation of the data written in the first memory cells of the nonvolatile memories.

5. The storage device according to claim 1 , further comprising:

a volatile memory, wherein

the controller maintains the parity data in the volatile memory.

6. A storage device comprising:

a plurality of nonvolatile memories each of which includes a first memory cell array and a second memory cell array, each memory cell array including first memory cells connected to a first word line; and

a controller configured to

maintain parity data for data written in the first memory cells in the first memory cell arrays of the nonvolatile memories, and

when carrying out data writing in the first memory cells of the first memory cell array and the second memory cell array in a targeted nonvolatile memory, which is one of the plurality of nonvolatile memories, upon detecting a failure in the data writing therein, carry out restoration of data that are to be written in the first memory cells of the first memory cell array of the targeted nonvolatile memory using the parity data.

7. The storage device according to claim 6 , wherein

each memory cell array further includes second memory cells connected to a second word line that is different from and adjacent to the first word line, and

the controller is further configured to:

maintain second parity data for data written in the second memory cells in the second memory cell arrays of the nonvolatile memories; and

upon detecting the failure in the data writing in the first memory cells of the second memory cell array in the targeted nonvolatile memory, carry out second restoration of data that were written in the second memory cells of the second memory cell array in the targeted nonvolatile memory.

8. The storage device according to claim 7 , wherein

the controller is further configured to write data restored through the second restoration in memory cells connected to a third word line different from the first and second word lines in the second memory cell array of the targeted nonvolatile memory.

9. The storage device according to claim 7 , wherein

the controller is further configured to generate the second parity data by performing an exclusive OR operation on the data written in the second memory cells in the second memory cell arrays of the nonvolatile memories.

10. The storage device according to claim 7 , wherein

the controller is further configured to generate the parity data by performing an exclusive OR operation on the data written in the first memory cells in the first memory cell arrays of the nonvolatile memories, and an exclusive OR operation on data written in the first memory cells in the second memory cell arrays of the nonvolatile memories.

11. The storage device according to claim 10 , wherein

the controller is configured to generate the parity data by performing an exclusive OR operation on results of the exclusive OR operations.

12. The storage device according to claim 6 , further comprising:

a volatile memory, wherein

the controller maintains the parity data in the volatile memory.

13. The storage device according to claim 6 , wherein

the controller is configured to carry out the restoration also using data that were written in the first memory cells in the first memory cell arrays of the plurality of nonvolatile memories other than the targeted nonvolatile memory.

14. The storage device according to claim 6 , wherein

the controller is further configured to write data restored through the restoration based on the parity data, in memory cells connected to a third word line different from the first line in the first memory cell array of the targeted nonvolatile memory.

15. The storage device according to claim 6 , wherein

the controller is further configured to generate the parity data by performing an exclusive OR operation on the data written in the first memory cells in the first memory cell arrays of the nonvolatile memories.

16. The storage device according to claim 6 , further comprising:

a volatile memory, wherein

the controller maintains the parity data in the volatile memory.

17. The storage device according to claim 6 , wherein

each of the plurality of nonvolatile memories further includes a driver, and

the driver drives the first word line in the first memory cell array and the first word line in the second memory cell array simultaneously.

18. A storage device comprising:

a plurality of nonvolatile memories each of which includes first memory cells connected to a first word line and second memory cells connected to a second word line that is different from and adjacent to the first word line; and

a controller configured to

when carrying out data writing in the second memory cells connected to the second word line in a targeted nonvolatile memory, which is one of the plurality of nonvolatile memories, upon detecting a failure in the data writing therein, carry out reading of data that were written in the first memory cells of the targeted nonvolatile memory.

19. The storage device according to claim 18 , wherein

the controller is further configured to maintain parity data for data written in the first memory cells of the nonvolatile memories, and

upon detecting the failure in the data writing in the second memory cells connected to the second word line in the targeted nonvolatile memory, carry out restoration of data that were written in the first memory cells of the targeted nonvolatile memory using the parity data.

20. The storage device according to claim 19 , wherein

the controller is further configured to generate the parity data by performing an exclusive OR operation of the data written in the first memory cells of the nonvolatile memories.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2017
From: OHNO, KATSUYA; WATANABE, KONOSUKE; YASUFUKU, KENTA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 042354/0357 →
Priority Claims (1)
JP 2016-187377 · Sep 26, 2016 · national
Continuity (1)
Related Publication 20180089021A1 · Mar 29, 2018