IP Library Granted Patent US 10,198,207
Granted Patent B2
US 10,198,207 · App. 15/448,781 · Granted Feb 5, 2019

Memory system and method for mapping nonvolatile memories

Inventors: Jong-Min Lee (Seoul, KR); Jee-Yul Kim (Gyeonggi-do, KR)
Assignee: SK Hynix Inc.
G06F3/064G06F3/061G06F3/0679G06F11/1004G06F12/00G06F12/0246G06F12/0292G06F2212/1016G06F2212/7201G06F2212/7208
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Quick Facts
Patent No.
US 10,198,207
App. No.
15/448,781
Granted
Feb 5, 2019
Kind
B2
Abstract

A memory system includes: a memory device including a plurality of pages which include a plurality of memory cells coupled to a plurality of word lines and in which data are stored, and a plurality of memory blocks in which the pages are included; and a controller including a memory, and suitable for storing data segments of user data corresponding to a write command received from a host, in pages included in a first memory block and a second memory block among the memory blocks and generating map data corresponding to storage of the data segments by sorting map segments of the map data according to logical informations of the data segments.

Claims (39)

1. A memory system comprising:

a memory device including a plurality of memory blocks, each memory block including a plurality of pages, each page including a plurality of memory cells for storing data; and

a controller suitable for storing data segments of user data, corresponding to a write command, in a plurality of pages included in the plurality of memory blocks, generating a map data corresponding to the stored data segments, dividing the map data into plural groups, each corresponding to each of the plurality of memory blocks, sorting map segments of the divided map data according to a logical address of the data segments, and storing the sorted map data in the memory device,

wherein the controller generates a first map data including a logical to physical (L2P) map segments indicating which logical address of the data segment is matched with a physical address of at least one page in the plurality of memory blocks, and a second map data including a physical to logical (P2L) map segments indicating which physical address is matched with a logical address of the data segment,

wherein the controller further comprises a memory,

wherein the controller stores the first map data and the second map data in the pages included in the plurality of memory blocks, and

wherein, in the case of updating the first map data and the second map data in correspondence to storage of the data segments, the controller loads the first map data and the second map data in the memory.

2. The memory system according to claim 1 , wherein the controller stores the first map data in pages included in a first memory block, and stores the second map data in pages included in a second memory block.

3. The memory system according to claim 2 ,

wherein the controller generates the first map data of the first memory block by sorting first map segments corresponding to the first memory block among the map segments, according to the logical information, and

wherein the controller generates the second map data of the second memory block by sorting second map segments corresponding to the second memory block among the map segments, according to the logical information.

4. The memory system according to claim 1 , wherein the controller stores the first map data and the second map data in pages included in a third memory block among the plurality of memory blocks.

5. The memory system according to claim 1 , wherein the controller updates the first map data and the second map data by merging map segments of the first map data and the second map data generated in correspondence to storage of the data segments and map segments of first map data and the second map data loaded in the memory.

6. The memory system according to claim 5 , wherein the controller updates the first map data and the second map data by merging the map segments of the first map data and the second map data in a state in which they are sorted according to the logical information.

7. The memory system according to claim 1 , wherein the controller sorts indexes indicating storage in the pages of the first memory block and the second memory block in the sequence of logical page numbers (LPNs) of the data segments, in a map table of the map data.

8. A method for operating a memory system, comprising:

receiving a write command, for a memory device including a plurality of memory blocks, each including a plurality of pages;

storing data segments of user data, corresponding to the write command, in pages included in the plurality of memory blocks;

generating a map data corresponding to storage of the data segments;

dividing the map data into plural groups, each corresponding to each of the plurality of memory blocks;

sorting map segments of the divided map data according to a logical address of the data segments;

storing the sorted map data in the memory device :

storing the first map data and the second map data in the pages included in the plurality of memory blocks, and

loading, in the case of updating the first map data and the second map data in correspondence to storage of the data segments, the first map data and the second map data in a

memory included in a controller, wherein the generating of the map data comprises:

generating a first map data including a logical to physical (L2P) map segments indicating which logical address of the data segment is matched with a physical address of at least one page in the plurality of memory blocks; and

generating a second map data including a physical to logical (P2L) map segments indicating which physical address is matched with a logical address of the data segment.

9. The method according to claim 8 , wherein the storing of the sorted map data comprises:

storing the first map data in pages included in a first memory block, and storing the second map data in pages included in a second memory block.

10. The method according to claim 9 , wherein the generating of the map data comprises:

generating the first map data of the first memory block by sorting first map segments corresponding to the first memory block among the map segments, according to the logical information; and

generating the second map data of the second memory block by sorting second map segments corresponding to the second memory block among the map segments, according to the logical information.

11. The method according to claim 8 , wherein the storing of the sorted map data comprises:

storing the first map data and the second map data in pages included in a third memory block among the plurality of memory blocks.

12. The method according to claim 8 , further comprising:

updating the first map data and the second map data by merging map segments of the first map data and the second map data generated in correspondence to storage of the data segments and map segments of first map data and the second map data loaded in the memory.

13. The method according to claim 12 , wherein the updating of the first map data and the second map data comprises updating the first map data and the second map data by merging the map segments of the first map data and the second map data in a state in which they are sorted according to the logical information.

14. The method according to claim 8 , wherein the generating of the map data comprises:

sorting indexes indicating storage in the pages of the first memory block and the second memory block in the sequence of logical page numbers (LPNs) of the data segments, in a map table of the map data.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2017
From: LEE, JONG-MIN; KIM, JEE-YUL
To: SK HYNIX INC.
Reel/Frame 041884/0932 →
Priority Claims (1)
KR 10-2016-0092414 · Jul 21, 2016 · national
Continuity (1)
Related Publication 20180024745A1 · Jan 25, 2018