IP Library Granted Patent US 10,056,315
Granted Patent B2
US 10,056,315 · App. 15/450,422 · Granted Aug 21, 2018

Semiconductor device

Inventors: Masayuki Akou (Yokohama, JP); Hiromasa Yoshimori (Yokohama, JP); Yoshihiro Sobue (Kamakura, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L23/481H01L23/49827H01L24/16H01L2224/16146H01L2924/1438
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Quick Facts
Patent No.
US 10,056,315
App. No.
15/450,422
Granted
Aug 21, 2018
Kind
B2
Abstract

A semiconductor device of an embodiment includes a semiconductor layer, a first conductor, a first conductive layer, a first insulating layer, a second conductive layer, and a plurality of second conductors. The semiconductor layer has a first region and a second region. The first conductor is provided in the semiconductor layer. The first conductive layer is electrically connected to the first conductor. The first insulating layer is provided in the semiconductor layer with at least part of the first insulating layer being provided between the first conductive layer and the semiconductor layer. A distance from the first insulating layer to the first region is smaller than a distance to the second region. A first distance to the first region from a plane that includes a first interface between the first insulating layer and the first conductive layer is larger than a second distance from the plane to the second region.

Claims (71)

1. A semiconductor device, comprising:

a semiconductor layer having a first region and a second region;

a first conductor provided in the semiconductor layer;

a first conductive layer electrically connected to the first conductor;

a first insulating layer, at least a part of the first insulating layer being provided in the semiconductor layer, at least a part of the first insulating layer being provided between the first conductive layer and the semiconductor layer, the first insulating layer surrounding the first conductor, a distance from the first insulating layer to the first region being smaller than a distance from the first insulating layer to the second region, a first distance to the first region from a plane that includes a first interface between the first insulating layer and the first conductive layer being larger than a second distance to the second region from the plane;

a second conductive layer, the first conductive layer being interposed between the second conductive layer and the first conductor;

a plurality of second conductors provided between the second conductive layer and the first conductive layer, the plurality of second conductors electrically connecting the second conductive layer and the first conductive layer;

a third conductive layer; and

a third conductor provided between the third conductive layer and the second region, the third conductor electrically connecting the third conductive layer and the second region.

2. The semiconductor device according to claim 1 , further comprising:

a second insulating layer, at least a part of the second insulating layer provided in the semiconductor layer, the second insulating layer located between the first region and the second region.

3. The semiconductor device according to claim 1 , wherein

the second conductors have an aspect ratio of at least 20.

4. The semiconductor device according to claim 1 , further comprising:

an insulating film provided between the first conductor and the semiconductor layer.

5. The semiconductor device according to claim 1 , wherein

the semiconductor layer is made of silicon.

6. The semiconductor device according to claim 1 , wherein

the semiconductor layer has a thickness of at least 30 μm.

7. A semiconductor device comprising:

a semiconductor layer having a first region and a second region;

a first conductor provided in the semiconductor layer;

a first conductive layer electrically connected to the first conductor;

a first insulating layer, at least a part of the first insulating layer being provided in the semiconductor layer, at least a part of the first insulating layer being provided between the first conductive layer and the semiconductor layer, the first insulating layer surrounding the first conductor, a distance from the first insulating layer to the first region being smaller than a distance from the first insulating layer to the second region, a first distance to the first region from a plane that includes a first interface between the first insulating layer and the first conductive layer being larger than a second distance to the second region from the plane;

a second conductive layer, the first conductive layer being interposed between the second conductive layer and the first conductor;

a plurality of second conductors provided between the second conductive layer and the first conductive layer, the plurality of second conductors electrically connecting the second conductive layer and the first conductive layer;

a fourth conductive layer; and

a third insulating layer provided between the fourth conductive layer and the first region, a distance from a second interface between the third insulating layer and the fourth conductive layer to the first region is smaller than a distance from the plane to the first region.

8. A semiconductor device, comprising:

a semiconductor layer including

a first semiconductor region of a first-conductivity type,

a second semiconductor region of a second-conductivity type, and

a third semiconductor region of the first-conductivity type, the second semiconductor region being located between the third semiconductor region and the first semiconductor region;

a first conductor provided in the first semiconductor region;

a first conductive layer electrically connected to the first conductor;

a first insulating layer, at least a part of the first insulating layer being provided in the semiconductor layer, at least a part of the first insulating layer being provided between the first conductive layer and the first semiconductor region, the first insulating layer surrounding the first conductor;

a second insulating layer, at least a part of the second insulating layer being provided in the semiconductor layer, the second semiconductor region being located between the second insulating layer and the first insulating layer, the third semiconductor region located between the second insulating layer and the first insulating layer, a first end portion of the first conductive layer located between the second insulating layer and the first insulating layer;

a second conductive layer, the first conductive layer being interposed between the second conductive layer and the first conductor; and

a plurality of second conductors provided between the second conductive layer and the first conductive layer, the plurality of second conductors electrically connecting the second conductive layer and the first conductive layer.

9. The semiconductor device according to claim 8 , wherein

the semiconductor layer includes a fourth semiconductor region of the second-conductivity type between the first conductive layer and the third semiconductor region.

10. The semiconductor device according to claim 8 , wherein

a second end portion of the first conductive layer is located on the first insulating layer, and

a distance from the second end portion to an end portion of the first insulating layer is from 150 nm to 300 nm.

11. The semiconductor device according to claim 8 , wherein

the second conductors have an aspect ratio of at least 20.

12. The semiconductor device according to claim 8 , further comprising:

an insulating film provided between the first conductor and the semiconductor layer.

13. The semiconductor device according to claim 8 , wherein

the semiconductor layer is made of silicon.

14. The semiconductor device according to claim 8 , wherein

the semiconductor layer has a thickness of at least 30 μm.

15. A semiconductor device, comprising:

a semiconductor layer including

a first semiconductor region of a first-conductivity type,

a second semiconductor region of a second-conductivity type, and

a third semiconductor region of the first-conductivity type, the second semiconductor region being located between the third semiconductor region and the first semiconductor region;

a first conductor provided in the first semiconductor region;

a first conductive layer electrically connected to the first conductor;

a first insulating layer, at least a part of the first insulating layer being provided in the semiconductor layer, at least a part of the first insulating layer being provided between the first conductive layer and the first semiconductor region, the first insulating layer surrounding the first conductor, the first insulating layer surrounded by the second semiconductor region and the third semiconductor region;

a second insulating layer, at least a part of the second insulating layer provided in the semiconductor layer, the second insulating layer surrounding the first insulating layer, the second semiconductor region located between the second insulating layer and the first insulating layer, the third semiconductor region located between the second insulating layer and the first insulating layer;

a second conductive layer, the first conductive layer being interposed between the second conductive layer and the first conductor; and

a plurality of second conductors provided between the second conductive layer and the first conductive layer, the plurality of second conductors electrically connecting the second conductive layer and the first conductive layer.

16. The semiconductor device according to claim 15 , wherein

an end of the first conductive layer is surrounded by an end of the first insulating layer.

17. The semiconductor device according to claim 15 , wherein

the second conductors have an aspect ratio of at least 20.

18. The semiconductor device according to claim 15 , further comprising:

an insulating film provided between the first conductor and the semiconductor layer.

19. The semiconductor device according to claim 15 , wherein

the semiconductor layer is made of silicon.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043129/0295 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2017
From: AKOU, MASAYUKI; YOSHIMORI, HIROMASA; SOBUE, YOSHIHIRO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 041974/0851 →
Continuity (2)
Provisional Application 62383008 · Sep 2, 2016
Related Publication 20180068928A1 · Mar 8, 2018