IP Library Granted Patent US 9,857,978
Granted Patent B1
US 9,857,978 · App. 15/454,768 · Granted Jan 2, 2018

Optimization of memory refresh rates using estimation of die temperature

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,857,978
App. No.
15/454,768
Granted
Jan 2, 2018
Kind
B1
Abstract

A memory system includes a memory in which stored data is periodically rewritten by a refresh command, and a memory controller. The memory has an input/output (“I/O”) terminal, and the memory controller is communicatively coupled by a channel to the I/O terminal. The memory transmits a plurality of commands over the channel to the memory. The memory controller estimates a first total energy consumed based on the plurality of commands during a first sampling period, determines a temperature of the memory based on the first total energy consumed in the first sampling period, determines a first refresh cycle rate corresponding to the first temperature of the memory and transmits a refresh command to the memory based on the first refresh cycle rate.

Claims (34)

1. A memory system comprising:

a memory configured to have stored data periodically rewritten by a refresh command, the memory having an input/output (“I/O”) terminal;

a memory controller communicatively coupled by a channel to the I/O terminal and configured to transmit a first plurality of commands over the channel to the memory, the memory controller further configured to:

estimate a first total energy consumed based on the first plurality of commands during a first sampling period;

determine a first temperature of the memory based on the first total energy consumed in the first sampling period;

determine a first refresh cycle rate corresponding to the first temperature of the memory, and

transmit a refresh command to the memory according to the first refresh cycle rate.

2. The memory system of claim 1 , wherein the controller is configured to determine the first temperature of the memory by determining a first temperature change based on the first total energy consumed during the first sampling period and adding the first temperature change to a stored temperature of the memory.

3. The memory system of claim 2 , wherein the memory controller is further configured to store the first temperature as a new stored temperature of the memory.

4. The memory system of claim 3 , wherein the memory controller is further configured to:

estimate a second temperature of the memory based on a second total energy consumed during a second sampling period and the new stored temperature of the memory; and

determine a second refresh cycle rate corresponding to the second temperature of the memory.

5. The memory system of claim 4 , wherein at a start-up condition of the memory, an ambient temperature output by a temperature sensor is used in determining the first temperature of the memory.

6. The memory system of claim 1 , wherein the first total energy consumed is calculated from a tally of the first plurality of commands, an average current for each of the plurality of commands, and a time for each of the first plurality of commands.

7. The memory system of claim 6 , wherein the memory controller includes a stored table of the average or peak current for each of the plurality of commands.

8. The memory system of claim 6 , wherein the average or peak current for a particular command of the plurality of commands is programmable.

9. The memory system of claim 1 , wherein the estimation of the first total energy consumed includes a heat dissipation component.

10. The memory system of claim 1 , wherein the first total energy consumed is estimated from a weighted average temperature change associated with each command of the first plurality of commands.

11. The memory system of claim 1 , wherein the controller is configured to execute a periodic background refresh command of the memory device based on the first refresh cycle rate.

12. The memory system of claim 1 , wherein the memory controller includes a stored table of optimum refresh cycle rates for a plurality of possible temperatures of the memory, and wherein the first refresh cycle rate is selected from the table based on the first temperature of the memory.

13. The memory system of claim 1 , wherein the memory controller is configured to estimate the first total energy consumed on a per-rank basis.

14. A method of determining a refresh rate for a memory device using an estimation of temperature, the method comprising:

recording, at a memory controller, a tally of commands transmitted to a memory within a sampling period;

receiving a signal that the sampling period is complete;

determining, at the memory controller, a total energy consumed associated with the transmitted commands in the tally;

estimating a temperature of the memory device based on the total energy consumed;

determining a refresh rate corresponding to the temperature of the memory device; and

transmitting a refresh command to a memory device based on the refresh rate.

15. The method of claim 14 , wherein determining a total energy consumed comprises integrating an average or peak current for each of the transmitted commands in the tally and a time period for each of the commands.

16. The method of claim 15 , wherein determining a total energy consumed further comprises subtracting a heat dissipation component.

17. The method of claim 14 , wherein the estimating the temperature of the memory device includes determining the temperature change of the memory device based on the total energy consumed in the sampling period, and adding the temperature change to stored temperature from a previous sampling period.

18. The method of claim 17 , wherein the estimating the temperature of the memory device based on the total energy consumed includes accounting for an ambient temperature reading from a temperature sensor.

19. The method of claim 18 , the method further comprising storing the first temperature as a new stored temperature for use in a next sampling period.

20. The method of claim 14 , wherein the determining a refresh rate includes accessing a look-up table.

Assignments (7)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2017
From: OCZ STORAGE SOLUTIONS LIMITED
To: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
Reel/Frame 043351/0426 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2017
From: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 043351/0456 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2017
From: GRIFFIN, JASON
To: OCZ STORAGE SOLUTIONS LIMITED
Reel/Frame 043351/0317 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043397/0380 →