IP Library Granted Patent US 9,864,946
Granted Patent B2
US 9,864,946 · App. 15/455,643 · Granted Jan 9, 2018

Low-profile real-time location system tag

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Quick Facts
Patent No.
US 9,864,946
App. No.
15/455,643
Granted
Jan 9, 2018
Kind
B2
Abstract

An example disclosed example includes a housing; a printed circuit board carried by the housing and including an antenna feed aperture; a logic circuit disposed on a first side of the printed circuit board, the logic circuit to generate blink data comprising pulses and data; an antenna disposed on a second side of the printed circuit board, the antenna in electrical communication with the logic circuit via the antenna feed aperture, the antenna configured to transmit the blink data; a dielectric potting material to protect the logic circuit; and a seal to cover the antenna feed aperture, the seal to prevent the dielectric potting material from entering the antenna feed aperture.

Claims (31)

1. A real-time location system tag comprising:

a housing;

a printed circuit board carried by the housing and including an antenna feed aperture;

a logic circuit disposed on a first side of the printed circuit board, the logic circuit to generate blink data comprising pulses and data;

an antenna disposed on a second side of the printed circuit board, the antenna in electrical communication with the logic circuit via the antenna feed aperture, the antenna configured to transmit the blink data;

a dielectric potting material to protect the logic circuit; and

a seal to cover the antenna feed aperture, the seal to prevent the dielectric potting material from entering the antenna feed aperture.

2. A real-time location system tag as defined in claim 1 , further comprising an antenna support coupled to the printed circuit board, wherein the antenna is seated in the antenna support.

3. A real-time location system tag as defined in claim 2 , further comprising:

an aperture in the antenna support; and

a radio frequency feed provided to the antenna through the aperture in the antenna support and the antenna feed aperture in the printed circuit board.

4. A real-time location system tag as defined in claim 1 , further comprising a power supply disposed on the first side of the printed circuit board.

5. A real-time location system tag as defined in claim 1 , wherein the antenna is a raised circular patch antenna.

6. A real-time location system tag as defined in claim 1 , further comprising a radio frequency shield covering transmitter electronics disposed on the printed circuit board.

7. A real-time location system tag as defined in claim 6 , wherein the radio frequency shield defines a metal can structured to cover the transmitter electronics.

8. A real-time location system tag as defined in claim 6 , wherein the seal encases the radio frequency shield and the antenna feed aperture.

9. A real-time location system tag as defined in claim 1 , wherein the potting material comprises an epoxy.

10. A real-time location system tag as defined in claim 1 , wherein the seal comprises a polyester material.

11. A method for fabricating a real-time location system tag, comprising:

positioning a printed circuit board in a housing, the printed circuit board including a logic circuit disposed on a first side of the printed circuit board, the printed circuit board including an antenna feed aperture, the logic circuit to facilitate transmission of blink data;

positioning an antenna in the housing and disposed on a second side of the printed circuit board, the antenna configured to transmit the blink data;

placing the antenna in electrical communication with the logic circuit via the antenna feed aperture;

affixing a seal to the printed logic circuit to cover the antenna feed aperture; and

depositing a dielectric potting material in the housing, wherein the seal prevents the dielectric potting material from entering the antenna feed aperture.

12. A method as defined in claim 11 , further comprising covering a portion of the logic circuit with a radio frequency shield.

13. A method as defined in claim 12 , wherein depositing the dielectric potting material in the housing is performed with the radio frequency shield covering the portion of the logic circuit.

14. A method as defined in claim 12 , wherein the portion of the logic circuit includes transmitter electronics.

15. A method as defined in claim 12 , further comprising grounding the radio frequency shield.

16. A method as defined in claim 12 , wherein affixing the seal to the printed logic circuit comprising covering the radio frequency shield with the seal.

17. A method as defined in claim 11 , further comprising seating the antenna in an antenna support having an aperture.

18. A method as defined in claim 17 , further comprising aligning the antenna feed aperture with the aperture of the antenna support to enable the placing of the antenna in electrical communication with the logic circuit via the antenna feed aperture.

Assignments (6)
RELEASE OF SECURITY INTEREST - 364 - DAY Recorded Mar 5, 2021
From: JPMORGAN CHASE BANK, N.A.
To: ZEBRA TECHNOLOGIES CORPORATION; LASER BAND, LLC; TEMPTIME CORPORATION
Reel/Frame 056036/0590 →
SECURITY INTEREST Recorded Sep 1, 2020
From: ZEBRA TECHNOLOGIES CORPORATION; LASER BAND, LLC; TEMPTIME CORPORATION
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 053841/0212 →
NOTICE OF TRANSFER OF SECURITY INTEREST IN PATENTS Recorded Jul 3, 2019
From: ZEBRA TECHNOLOGIES CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 049675/0049 →
MERGER Recorded Mar 29, 2019
From: ZIH CORP.
To: ZEBRA TECHNOLOGIES CORPORATION
Reel/Frame 048884/0618 →
SECURITY INTEREST Recorded Oct 25, 2017
From: ZIH CORP.
To: JPMORGAN CHASE BANK, N.A., AS THE SUCCESSOR AGENT
Reel/Frame 044616/0736 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2017
From: RICHLEY, EDWARD A.
To: ZIH CORP.
Reel/Frame 042790/0801 →