IP Library Granted Patent US 9,980,378
Granted Patent B1
US 9,980,378 · App. 15/456,083 · Granted May 22, 2018

Surface mount connector pad

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Quick Facts
Patent No.
US 9,980,378
App. No.
15/456,083
Granted
May 22, 2018
Kind
B1
Abstract

A circuit board includes first and second lines of surface mount pads, and a trace. The surface mount pads within the first line extend from a first edge of the circuit board toward a second edge of the circuit board. The surface mount pads within the second line extend from the first edge of the circuit board toward the second edge of the circuit board, and the surface mount pads within the second line are further from a third edge of the circuit board as compared to the surface mount pads within the first line. The trace is located on a top surface of the circuit board, and extends from the third edge to a fourth edge of the circuit board. The spacing between first adjacent surface mount pads within the first line enables the trace to be routed between the first adjacent surface mount pads with less crosstalk between signals on the trace and signals on the surface mount pads within the first line.

Claims (30)

1. A circuit board comprising:

a first line of surface mount pads, wherein the surface mount pads within the first line provide a first connection type, and the surface mount pads within the first line extend from a first edge of the circuit board toward a second edge of the circuit board;

a second line of surface mount pads, wherein the surface mount pads within the second line provide a second connection type, the surface mount pads within the second line extend from the first edge of the circuit board toward the second edge of the circuit board, and the surface mount pads within the second line are further from a third edge of the circuit board as compared to the surface mount pads within the first line; and

a trace on a top surface of the circuit board, the trace extending from the third edge to a fourth edge of the circuit board, wherein spacing between first adjacent surface mount pads within the first line enables the trace to be routed between the first adjacent surface mount pads with less crosstalk between signals on the trace and signals on the surface mount pads within the first line.

2. The circuit board of claim 1 wherein spacing between second adjacent surface mount pads within the second line enables the trace to be routed between the second adjacent surface mount pads with less crosstalk between the signals on the trace and signals on the surface mount pads within the second line.

3. The circuit board of claim 1 further comprising:

a third line of surface mount pads, wherein the surface mount pads within the third line provide the first connection type, the surface mount pads within the third line extend from the first edge of the circuit board toward the second edge of the circuit board, and the surface mount pads within the third line are further from the third edge of the circuit board as compared to the surface mount pads within both the first line and the second line.

4. The circuit board of claim 1 wherein the first connection type is a signal connection, and the second connection type is a ground connection.

5. The circuit board of claim 4 wherein each of the surface mount pads within the first line are configured to be connected to a different signal connector pin of a dual in-line memory module.

6. The circuit board of claim 5 wherein each of the surface mount pads within the second line are configured to be connected to two ground connector pins of the dual in-line memory module.

7. A circuit board comprising:

a first line of surface mount pads, wherein the surface mount pads within the first line alternate between a first connection type and a second connection type, and the surface mount pads within the first line extend from a first edge of the circuit board toward a second edge of the circuit board;

a second line of surface mount pads, wherein the surface mount pads within the second line alternate between the first connection type and the second connection type, the surface mount pads within the second line extend from the first edge of the circuit board toward the second edge of the circuit board, and the surface mount pads within the second line are further from a third edge of the circuit board as compared to the surface mount pads within the first line, wherein the surface mount pads within the first and second lines form a checkered pattern on a top surface of the circuit board; and

a trace on the top surface of the circuit board, the trace extending from the third edge to a fourth edge of the circuit board, wherein the checkered pattern of the first and second lines creates spacing between first adjacent surface mount pads within the first line enables the trace to be routed between the first adjacent surface mount pads with less crosstalk between signals on the trace and signals on the surface mount pads within the first line.

8. The circuit board of claim 7 wherein the checkered pattern is formed by a first surface mount pad within the first line having a first portion of a first edge of a footprint of the first surface mount pad being removed, and by a second surface mount pad within the first line having second and third portions of a second edge of a footprint of the second surface mount pad being removed.

9. The circuit board of claim 8 wherein the first edge of the first surface mount pad is adjacent to the second edge of the second surface mount pad.

10. The circuit board of claim 9 wherein the first portion of the first edge of the first surface mount pad is complementary to the second and third portions of the second edge of the second surface mount pad.

11. The circuit board of claim 8 wherein the checkered pattern is further formed by the second surface mount pad within the first line having a fourth portion of a third edge of the footprint of the second surface mount pad being removed, and by a third surface mount pad within the first line having fifth and sixth portions of a fourth edge of a footprint of the third surface mount pad being removed.

12. The circuit board of claim 11 wherein the third edge of the second surface mount pad is adjacent to the fourth edge of the third surface mount pad.

13. The circuit board of claim 12 wherein the fourth portion of the third edge of the second surface mount pad is complementary to the fifth and sixth portions of the fourth edge of the fourth surface mount pad.

14. A circuit board comprising:

a first line of surface mount pads, wherein the surface mount pads within the first line extend from a first edge of the circuit board toward a second edge of the circuit board;

a second line of surface mount pads, wherein the surface mount pads within the second line extend from the first edge of the circuit board toward the second edge of the circuit board, and the surface mount pads within the second line are further from a third edge of the circuit board as compared to the surface mount pads within the first line; and

a trace on a top surface of the circuit board, the trace extending from the third edge to a fourth edge of the circuit board, wherein spacing between first adjacent surface mount pads within the first line enables the trace to be routed between the first adjacent surface mount pads with less crosstalk between signals on the trace and signals on the surface mount pads within the first line.

15. The circuit board of claim 14 wherein the surface mount pads within the first line alternate between a first connection type and a second connection type, and wherein the surface mount pads within the second line alternate between the first connection type and the second connection type.

16. The circuit board of claim 15 wherein the spacing between the first adjacent surface mount pads results from a checkered pattern of the surface mount pads within both the first and second lines.

17. The circuit board of claim 16 wherein the checkered pattern is formed by a first surface mount pad within the first line having a first portion of a first edge of a footprint of the first surface mount pad being removed, and by a second surface mount pad within the first line having second and third portions of a second edge of a footprint of the second surface mount pad being removed.

18. The circuit board of claim 14 wherein the surface mount pads within the first line only provide a first connection type, and wherein the surface mount pads within the second line only provide second connection type.

19. The circuit board of claim 18 wherein the first connection type is a signal connection, and the second connection type is a ground connection.

20. The circuit board of claim 19 wherein each of the surface mount pads within the first line are configured to be connected to a different signal connector pin of a dual in-line memory module, and each of the surface mount pads within the second line are configured to be connected to two ground connector pins of the dual in-line memory module.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (042769/0001) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0802 →
RELEASE OF SECURITY INTEREST AT REEL 042768 FRAME 0585 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058297/0536 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY INTEREST (CREDIT) Recorded Jun 12, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 042768/0585 →
PATENT SECURITY INTEREST (NOTES) Recorded Jun 12, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 042769/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2017
From: MUTNURY, BHYRAV M.; WINTERBERG, DOUGLAS S.
To: DELL PRODUCTS, LP
Reel/Frame 041749/0785 →