IP Library Granted Patent US 10,523,245
Granted Patent B2
US 10,523,245 · App. 15/460,155 · Granted Dec 31, 2019

Soft decoder for generalized product codes

Inventors: Naveen Kumar (San Jose, CA); Aman Bhatia (San Jose, CA); Yi-Min Lin (San Jose, CA)
Assignee: SK Hynix Inc.
H03M13/6502H03M13/2909H03M13/2942H03M13/2963H03M13/2978H03M13/453H03M13/152
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Quick Facts
Patent No.
US 10,523,245
App. No.
15/460,155
Granted
Dec 31, 2019
Kind
B2
Abstract

A memory device includes a memory array, a processor, and a decoding apparatus. The processor is coupled to the memory array and configured to read encoded data from the memory array. The encoded data includes a plurality of data blocks and each data block is included in two or more data codewords. Further, data codewords belonging to a same pair of data codewords share a common data block. The decoding apparatus is configured to iteratively decode data codewords using hard decoding and soft decoding, and to correct stuck errors by identifying failed data blocks based on shared blocks between failed data codewords.

Claims (39)

1. A memory device, comprising:

a memory array;

a processor coupled to the memory array and configured to read encoded data from the memory array, wherein the encoded data includes a group of data bits arranged in data blocks, the data blocks including information blocks of information bits and one or more XOR blocks of XOR bits, the XOR bits formed by exclusive OR operation on the information bits, the encoded data being encoded in a product code into a plurality of data codewords, and each data codeword including a number of data blocks, wherein each data block is included in two or more data codewords, and data codewords belonging to a same pair of data codewords share a common data block; and

a decoding apparatus configured to:

iteratively decode the data codewords using hard decoding and soft decoding to determine failed data codewords; and

correct stuck errors by identifying failed data blocks based on shared common data blocks between failed data codewords, and, in the shared common data blocks, flip failed bits identified from decoding the one or more XOR blocks.

2. The memory device of claim 1 , wherein the encoded data comprises:

a plurality of data codewords, each data codeword including a number of data blocks and a parity block having a number of parity bits, and the parity bits are formed by encoding the data blocks using a first error-correcting coding scheme; and

one or more parity-on-parity (POP) codewords formed by encoding the parity bits of the data codewords using a second error-correcting coding scheme.

3. The memory device of claim 2 , wherein the decoding apparatus is configured to iteratively decode the data codewords by:

first hard decoding of the data codewords and the POP codewords;

soft decoding of the data codewords;

second hard decoding of the data codewords and the POP codewords; and

soft decoding of the POP codewords.

4. The memory device of claim 2 , wherein the decoding apparatus is configured to correct stuck errors by:

correcting stuck errors in the POP codewords by identifying failed parity blocks based on failed data codewords and failed POP codewords.

5. The memory device of claim 4 , wherein correcting stuck errors in the data blocks comprises:

determining a list of failed data codewords by including, in the list, those data codewords having more corrections than allowed by a restricted error correction capability of the first error-correcting coding scheme;

identifying potential failed data blocks based on shared blocks between failed data codewords;

identifying potential failed bits in failed data blocks using information from the XOR blocks of XOR bits; and

flipping one or more potential failed bits.

6. The memory device of claim 4 , wherein correcting stuck errors in the POP codewords comprises:

determining a list of failed POP codewords by including, in the list, those POP codewords having more corrections than allowed by a restricted error correction capability of the second error-correcting coding scheme;

identifying potential failed parity blocks based on failed data codewords and failed POP codewords; and

flipping one or more potential failed bits.

7. A method for decoding data, the method comprising:

reading encoded data from a memory array, wherein the encoded data includes a group of data bits arranged in data blocks, the data blocks including information blocks of information bits and one or more XOR blocks of XOR bits, the XOR bits formed by exclusive OR operation on the information bits, the encoded data being encoded in a product code into a plurality of data codewords and each data codeword including a number of data blocks, wherein each data block is included in two or more data codewords, wherein data codewords belonging to a same pair of data codewords share a common data block;

iteratively decoding the data codewords using hard decoding and soft decoding to determine failed data codewords; and

correcting stuck errors by identifying failed data blocks based on shared common data blocks between failed data codewords in the iterative decoding, and, in the shared common data blocks, flipping failed bits identified from decoding the one or more XOR blocks.

8. The method of claim 7 , wherein the encoded data comprises:

a plurality of data codewords, each data codeword including a number of data blocks and a parity block having a number of parity bits, the parity bits formed by encoding the data blocks using a first error-correcting coding scheme; and

one or more parity-on-parity (POP) codewords formed by encoding the parity bits of the data codewords using a second error-correcting coding scheme.

9. The method of claim 8 , wherein iteratively decoding data codewords comprises:

first hard decoding of the data codewords and the POP codewords;

soft decoding of the data codewords;

second hard decoding of the data codewords and the POP codewords; and

soft decoding of the POP codewords.

10. The method of claim 8 , wherein the method further comprises:

correcting stuck errors in the POP codewords by identifying failed parity blocks based on failed data codewords and failed POP codewords.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: SK HYNIX MEMORY SOLUTIONS INC.
To: SK HYNIX INC.
Reel/Frame 043389/0705 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2017
From: KUMAR, NAVEEN; BHATIA, AMAN; LIN, YI-MIN
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 043347/0818 →
Continuity (2)
Provisional Application 62312353 · Mar 23, 2016
Related Publication 20170279468A1 · Sep 28, 2017
Cited By (1)
US 12,658,942