IP Library Granted Patent US 9,886,046
Granted Patent B2
US 9,886,046 · App. 15/466,347 · Granted Feb 6, 2018

Voltage regulator

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Quick Facts
Patent No.
US 9,886,046
App. No.
15/466,347
Granted
Feb 6, 2018
Kind
B2
Abstract

A voltage regulator includes an operational amplifier that compares a feedback voltage that is proportional to an output voltage and a predetermined reference voltage that corresponds to a desired output voltage. The operational amplifier controls the conduction state of an output transistor according to the comparison. A detecting circuit monitors the operating state of the operational amplifier, and in the case that the operational amplifier is not operating, outputs a signal which causes the output transistor to be placed in a non-conductive state.

Claims (38)

1. A voltage regulator, comprising:

a first power source terminal at which an input voltage can be applied;

a second power source terminal at which a predetermined reference voltage can be applied;

a third power source terminal at which a ground voltage can be applied;

an output terminal at which an output voltage can be output;

an operational amplifier configured to compare the predetermined reference voltage to a feedback voltage that is proportional to the output voltage and output an output signal corresponding to the comparison of the predetermined reference voltage and the feedback voltage;

a detecting circuit configured to detect an operating state of the operational amplifier; and

an output transistor connected between the first power source terminal and the output terminal, wherein

the detecting circuit includes:

a first transistor connected between the first power source terminal and a gate of the output transistor, and

a second transistor between the first power source terminal and the third power terminal,

a gate of the first transistor is coupled to one of a source and a drain of the second transistor, and

the operational amplifier includes a third transistor having a source that is connected to the third power source terminal, and a gate that is connected to a gate of the second transistor.

2. The voltage regulator according to claim 1 , wherein the detecting circuit further includes an inverter connected between a gate of the first transistor and the drain of the second transistor.

3. The voltage regulator according to claim 2 , wherein the detecting circuit further includes a current source connected between the first power source terminal and the drain of the second transistor.

4. The voltage regulator according to claim 2 , wherein the detecting circuit further includes a resistor connected between the first power source terminal and the drain of the second transistor.

5. The voltage regulator according to claim 1 , wherein the operational amplifier further includes a fifth transistor having gate that is connected to the gate of the third transistor and a source that is connected to the third power source terminal.

6. The voltage regulator according to claim 5 , wherein the operational amplifier further includes a sixth transistor having a gate that is connected to the second power source terminal, and one of a source and a drain of the sixth transistor is connected to the drain and the gate of the third transistor.

7. A voltage regulator, comprising:

a first power source terminal at which an input voltage can be applied;

a second power source terminal at which a predetermined reference voltage can be applied;

a third power source terminal at which a ground voltage can be applied;

an output terminal at which an output voltage can be output;

an operational amplifier configured to compare the predetermined reference voltage to a feedback voltage that is proportional to the output voltage and output an output signal corresponding to the comparison of the predetermined reference voltage and the feedback voltage;

a detecting circuit configured to detect an operating state of the operational amplifier; and

an output transistor connected between the first power source terminal and the output terminal, wherein

the detecting circuit includes:

a first transistor connected between the first power source terminal and a gate of the output transistor, and

a second transistor between the first power source terminal and the third power source terminal,

a gate of the first transistor is coupled to one of a source and a drain of the second transistor, and

the operational amplifier includes a third transistor having a gate that is connected to the second power source terminal and the gate of the second transistor.

8. The voltage regulator according to claim 7 , wherein the detecting circuit further includes an inverter connected between a gate of the first transistor and the source of the second transistor.

9. The voltage regulator according to claim 8 , wherein the detecting circuit further includes a current source connected between the third power source terminal and the source of the second transistor.

10. The voltage regulator according to claim 8 , wherein the detecting circuit further includes a resistor connected between the third power source terminal and the source of the second transistor.

11. The voltage regulator according to claim 7 , further comprising:

a fourth power source terminal at which a bias voltage can be applied, wherein

the operational amplifier further includes a fifth transistor between the first power source terminal and the third transistor, a gate of the fifth transistor being connected to the fourth power source terminal, and

the detecting circuit further includes a sixth transistor provided between the first power source terminal and the second transistor, a gate of the sixth transistor is connected to the gate of the fifth transistor.

Assignments (4)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →