IP Library Granted Patent US 10,372,366
Granted Patent B2
US 10,372,366 · App. 15/467,515 · Granted Aug 6, 2019

Memory system with multiple striping of RAID groups and method for performing the same

Inventor: Jon C. R. Bennett (Sudbury, MA)
Assignee: VIOLIN SYSTEMS LLC
G06F3/064G06F3/0619G06F3/0689G06F11/108G06F11/1068G11B20/1833G11C29/52G06F3/0611G06F3/0659G06F12/0246G11B2220/60
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Quick Facts
Patent No.
US 10,372,366
App. No.
15/467,515
Granted
Aug 6, 2019
Kind
B2
Abstract

A data memory system is described, where there may be an asymmetry in the time needed to write or erase data and the time needed to read data. The data may be stored using a RAID data storage arrangement and the reading, writing and erasing operations on the modules arranged such that the erasing and writing operations may be performed without significant latency for performing a read operation. Where a failure of a memory module in the memory system occurs, methods for recovering the data of the failed module are disclosed which may selected in accordance with policies that may relate to the minimizing the possibility of irretrievable data loss, or degradation of latency performance.

Claims (36)

1. A memory system, comprising:

a controller in communication with a plurality of memory modules, the memory system operable to perform: a write data operation responsive to a request from a user to store data; a read data operation in response to a request from the user for previously stored data; or, an erase operation; and

a group of memory modules of the plurality of memory modules configured such that data received from the user, and redundancy data for the user data that is computed by the memory system, is written by the write data operation,

wherein the memory system is operable to perform the erase operation on the memory modules of the group of memory modules such that, responsive to a user request to read data previously stored in one or more memory modules of the group of memory modules, the requested stored user data is provided in response to the user request; and, when the erase operation prevents the read data operation from being performed on the memory module of the group of memory modules where the requested user data is stored, sufficient previously stored data and redundancy data for the previously stored data is read from memory modules of the group of memory modules to provide the requested stored user data, with a time delay of less than a time period required to perform an erase operation by the memory module.

2. The memory system of claim 1 , wherein the data requested by the user is provided to the user prior to a completion of the erase operation.

3. The memory system of claim 1 , wherein the sufficient previously stored data and the redundancy data are used to reconstruct the data when the erase operation prevents the read data operation from being performed.

4. The memory system of claim 1 , wherein when the redundancy data is single parity data, the user data is reconstructed using an exclusive-OR operation.

5. The memory system of claim 1 , wherein the redundancy data is dual parity data.

6. The memory system of claim 1 , where memory modules of the group of memory modules are Solid State Disks (SSD).

7. The memory system of claim 6 , wherein the SSDs have an industry standard protocol.

8. The memory system of claim 7 , wherein the industry standard protocol is one of SATA, SCSI or Fibre Channel.

9. The memory system of claim 1 , wherein memory modules are NAND FLASH chips, or NAND FLASH dies.

10. The memory system of claim 1 , wherein the memory modules are comprised of comprised of NAND FLASH memory circuits.

11. The memory system of claim 1 , wherein the group of memory modules is configured as a RAID (Redundant Array of Independent Disks) group.

12. A method of storing data in a memory system, including:

providing a controller in communication with a plurality of memory modules and with a user;

each memory module of the plurality of memory modules comprise NAND FLASH memory circuits operable to perform a read data operation, to perform a write data operation, or to perform an erase operation; and

in response to data received from the user by the controller to be stored in the memory system:

computing redundancy data for the user data;

selecting a group of memory modules of the plurality of memory modules;

performing the write data operation to memory modules of the selected group of memory modules for the user data and the redundancy data; and,

controlling at least one of erasing or reading operations of the memory modules of the group of memory modules where the user data or redundancy data is stored such that:

in response to a request for stored data received from the user:

when the erase operation or the write data operation prevents the read data operation on one or more memory modules where the requested user data is stored, responding to the user request for data stored on one or more memory modules of the group of memory modules comprises reading sufficient stored data and redundancy data from other memory modules of the group of memory modules and reconstructing the requested stored user data.

13. The method of claim 12 , wherein when the redundancy data is single parity data; and

responding to the user request for data when less than all of the requested user data has been read from the memory modules due to the write data or erase operations by computing an exclusive-OR (X-OR) of the less than all of the requested user data and the parity data that has been read from the memory modules.

14. The method of claim 12 , further comprising sending a read command only to the modules of the group of modules that are not performing write operations or erase operations.

15. The method of claim 12 , further comprising sending a read command to all of the modules of the group of modules.

16. The method of claim 12 , wherein the group of memory modules is configured as a RAID (Redundant Array of Independent Disks) group.

17. A memory system, comprising:

a controller in communication with a plurality of memory modules the memory system operable to perform: a write data operation responsive to a request from a user to store data; a read data operation in response to a request from the user for previously stored data; or, an erase operation; and

a group of memory modules of the plurality of memory modules configured such that data received from the user, and redundancy data for the user data that is computed by the memory system, is written by the write data operation,

wherein the memory system is operable to perform the write data operation on the memory modules of the group of memory modules such that, responsive to a user request to read data previously stored in one or more memory modules of the group of memory modules, the requested stored user data is provided in response to the user request; and, when the write data operation prevents the read data operation from being performed on the memory module of the group of memory modules where the requested user data is stored, sufficient previously stored data and redundancy data for the previously stored data is read from memory modules of the group of memory modules to provide the requested stored user data, with a time delay of less than a time period required to perform a write data operation by the memory module.

18. The memory system of claim 17 , wherein the write data operation is a plurality of write data operations performed to the memory module and the time delay is less than a time period required to perform the plurality of the write data operations.

19. The memory system of claim 17 , wherein the data requested by the user is provided to the user prior to a completion of the write data operation.

20. The memory system of claim 17 , where memory modules of the group of memory modules are Solid State Disks (SSD).

Assignments (6)
CORRECTIVE ASSIGNMENT TO REMOVE US PATENT NO. 9013874 PREVIOUSLY RECORDED UNDER REEL AND FRAME 064272/0249. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 17, 2024
From: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC)
To: INNOVATIONS IN MEMORY LLC
Reel/Frame 068998/0780 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2023
From: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC)
To: INNOVATIONS IN MEMORY LLC
Reel/Frame 064272/0249 →
CHANGE OF NAME Recorded May 25, 2021
From: VIOLIN SYSTEMS LLC
To: VSIP HOLDINGS LLC
Reel/Frame 056366/0849 →
CHANGE OF NAME Recorded Dec 19, 2017
From: VIOLIN MEMORY, INC.
To: VIOLIN SYSTEMS LLC
Reel/Frame 044908/0680 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2017
From: BENNETT, JON C.R.
To: VIOLIN MEMORY INC.
Reel/Frame 044055/0598 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2017
From: BENNETT, JON C.R.
To: VIOLIN MEMORY INC.
Reel/Frame 044042/0571 →
Continuity (5)
Continuation 12901224 · Oct 8, 2010
Continuation In Part 12079364 · Mar 26, 2008
Provisional Application 61250216 · Oct 9, 2009
Provisional Application 60920737 · Mar 29, 2007
Related Publication 20170199670A1 · Jul 13, 2017
Cited By (1)
US 12,626,731