Semiconductor device and the manufacturing method thereof
View Patent ↗The present disclosure discloses a method forming a semiconductor light-emitting unit, comprising the steps of providing a semiconductor substrate; epitaxially growing a reaction layer on the semiconductor substrate; and epitaxially growing a buffer layer on the reaction layer; wherein the buffer layer and the semiconductor substrate are lattice-mismatched, and a dislocation density of the buffer layer is smaller than smaller than 1*10 9 cm −2 .
1. A method forming a semiconductor light-emitting unit, comprising the steps of:
providing a semiconductor substrate;
epitaxially growing a reaction layer on the semiconductor substrate; and
epitaxially growing a buffer layer on the reaction layer,
wherein the buffer layer and the semiconductor substrate are lattice-mismatched, and a dislocation density of the buffer layer is smaller than 1*10 9 cm −2 , and
wherein the buffer layer comprises GaP or InP.
2. The method according to claim 1 , further comprising a step of forming a pattern surface by patterning a surface of the reaction layer, and epitaxially growing a light-emitting stack on the buffer layer.
3. The method according to claim 1 , wherein a difference of lattice constant between the buffer layer and the semiconductor substrate is larger than 0.1Å.
4. The method according to claim 1 , wherein an X-ray diffraction (XRD) chart of the buffer layer comprises a Full Width at Half Maximum (FWHM) smaller than 500 arcsec.
5. The method according to claim 1 , wherein a bandgap of the buffer layer is smaller than 1.4eV.
6. The method according to claim 1 , wherein the semiconductor substrate comprises IIIA arsenide.
7. The method according to claim 6 , wherein semiconductor substrate comprises GaAs.
8. The method according to claim 2 , wherein the patterned surface comprises a regular pattern.
9. The method according to claim 8 , wherein the regular pattern comprises multiple cylinders and a distance between any two of the neighboring cylinders is the same.
10. The method according to claim 2 , wherein the patterned surface comprises an irregular pattern.
11. The method according to claim 1 , wherein the reaction layer comprises III-V semiconductor compound.
12. The method according to claim 11 , wherein the reaction layer comprises ternary III-V semiconductor compound or quaternary III-V semiconductor compound.
13. The method according to claim 1 , wherein a thickness of the reaction layer is between 0.1 μm and 10 μm.
14. The method according to claim 2 , wherein the light-emitting stack emits a light with a peak wavelength between 1000 nm and 1500 nm.
15. The method according to claim 2 , wherein the light-emitting stack comprises a first semiconductor layer, an active layer on the first semiconductor layer, a second semiconductor layer on the active layer, and wherein the active layer comprises (Al x Ga 1−x ) y In 1−y As, 0<x<1, 0<y<1.
16. The method according to claim 15 , wherein both of the active layer and the semiconductor substrate comprise Ga or As.
17. The method according to claim 15 , wherein the first semiconductor layer and the second semiconductor layer comprises InP or In b Al 1−b As, 0<b<1.
18. The method according to claim 2 , further comprising a step of forming a protective layer on the reaction layer, wherein the reaction layer comprises Al.
19. The method according to claim 18 , further comprising a step of removing the protective layer, wherein the protective layer is devoid of Al.