Method for estimating an operating profile of an integrated circuit of a system-on-a-chip, and corresponding system-on-a-chip
View Patent ↗A system-on-a-chip includes an integrated circuit and an estimation circuit. The estimation circuit operates to acquire at least one physical parameter representative of the use of the integrated circuit and determine an instantaneous state of aging of the integrated circuit as a function of the at least one physical parameter. A margin of use of the integrated circuit is then calculated by comparing the instantaneous state of aging with a presumed state of aging.
1. A method for estimating an operating profile of an integrated circuit of a system-on-a-chip, comprising:
monitoring to acquire at least one physical parameter representative of use of the integrated circuit;
evaluating the at least one physical parameter to determine an instantaneous state of aging of the integrated circuit as a function of the at least one physical parameter; and
calculating a margin of use for the integrated circuit from a comparison of the instantaneous state of aging with a presumed state of aging.
2. The method according to claim 1 , wherein acquisition of the at least one physical parameter and determination of the margin of use are periodically carried out in real time.
3. The method according to claim 1 , wherein the at least one physical parameter representative of use of the integrated circuit is selected from the group consisting of: temperature, voltage, duration of activity and time.
4. The method according to claim 1 , wherein evaluating comprises:
recording the margin of use and the instantaneous state of aging of the integrated circuit prior to each power down of the system-on-a-chip; and
calculating a later instantaneous state of aging as a function of a saved previous instantaneous state of aging.
5. The method according to claim 1 , wherein evaluating to determine the instantaneous state of aging of the integrated circuit comprises at least one of:
calculating an acceleration factor in voltage between a normal usage power supply voltage of the integrated circuit and a measured power supply voltage of the integrated circuit;
calculating an acceleration factor in temperature between a normal usage temperature of the integrated circuit and a measured temperature of the integrated circuit; and
calculating the instantaneous state of aging taking into account a cumulated duration of activity of the integrated circuit.
6. The method according to claim 1 , further comprising determining the presumed state of aging of the integrated circuit by: multiplying an estimated state of aging by an effective fractional utilization equal to a ratio between a cumulated duration of activity of the integrated circuit and an estimated lifetime, wherein the estimated state of aging and the estimated lifetime are pre-established based on a given utilization model for the integrated circuit.
7. The method according to claim 6 , further comprising configuring by a user of the system-on-a-chip the given utilization model.
8. The method according to claim 1 , wherein calculating the margin of use of the integrated circuit comprises subtracting the instantaneous state of aging from the presumed state of aging.
9. A system-on-a-chip, comprising;
at least one integrated circuit; and
a circuit configured to estimate an operating profile of said at least one integrated circuit, comprising:
a monitoring circuit configured to acquire at least one physical parameter representative of use of the integrated circuit; and
an evaluation circuit configured to determine an instantaneous state of aging of the integrated circuit as a function of the at least one physical parameter and calculate a margin of use of the integrated circuit as a function of a comparison of the instantaneous state of aging with a presumed state of aging.
10. The system-on-a-chip according to claim 9 , wherein the monitoring circuit and the evaluation circuit are respectively configured to acquire the at least one physical parameter and determine the margin of use periodically in real time.
11. The system-on-a-chip according to claim 9 , further comprising at least one in-situ sensor configured to measure the at least one physical parameter representative of the use of the integrated circuit, the at least one in-situ sensor selected from the group consisting of:
a temperature sensor, a voltage sensor, a sensor for duration of activity and a timer.
12. The system-on-a-chip according to claim 9 , further comprising a non-volatile memory, wherein the evaluation circuit is further configured to recording the margin of use and the instantaneous state of aging of the integrated circuit in the non-volatile memory prior to each power down of the system-on-a-chip and further calculate a later instantaneous state of aging as a function of a saved previous instantaneous state of aging.
13. The system-on-a-chip according to claim 9 , wherein the evaluation circuit is configured to determine the instantaneous state of aging of the integrated circuit by at least one of:
calculating an acceleration factor in voltage between a normal usage power supply voltage of the integrated circuit and a measured power supply voltage of the integrated circuit,
calculating an acceleration factor in temperature between a normal usage temperature of the integrated circuit and a measured temperature of the integrated circuit, and
calculating the instantaneous state of aging as a function of a cumulated duration of activity of the integrated circuit.
14. The system-on-a-chip according to claim 9 , wherein the evaluation circuit is configured to determine the presumed state of aging of the integrated circuit by applying, to an estimated state of aging, an effective fractional utilization equal to a ratio between a cumulated duration of activity of the integrated circuit and an estimated lifetime, wherein the estimated state of aging and the estimated lifetime are pre-established based on a given utilization model for the integrated circuit.
15. The system-on-a-chip according to claim 14 , further comprising a user configuration input configured to enable a user of the system-on-a-chip to configure the given utilization model.
16. The system-on-a-chip according to claim 9 , wherein the evaluation circuit is configured to calculate the margin of use of the integrated circuit by subtracting the instantaneous state of aging from the presumed state of aging.
17. The system-on-a-chip according to claim 9 , further comprising a calculation unit, wherein the evaluation circuit comprises software modules implemented within and executed by the at least one integrated circuit.
18. The system-on-a-chip according to claim 9 , wherein the system-on-a-chip is a component of a computer or a mobile telephone.
19. The system-on-a-chip of claim 9 , wherein the instantaneous state of aging of the integrated circuit reflects real aging of the integrated circuit, wherein the presumed state of aging reflects predicted aging of the integrated circuit, and wherein the predicted aging is predicted within a given mission profile.
20. The system-on-a-chip of claim 9 , wherein the margin of use represents permitted operating limits of the integrated circuit, and wherein the permitted operating limits are limits of a power supply voltage supplied to the integrated circuit and of an operating frequency of the integrated circuit.
21. The method of claim 1 , wherein the instantaneous state of aging of the integrated circuit reflects real aging of the integrated circuit, wherein the presumed state of aging reflects predicted aging of the integrated circuit, and wherein the predicted aging is predicted within a given mission profile.
22. The method of claim 1 , wherein the margin of use represents permitted operating limits of the integrated circuit, and wherein the permitted operating limits are limits of a power supply voltage supplied to the integrated circuit and of an operating frequency of the integrated circuit.