IP Library Granted Patent US 10,187,599
Granted Patent B2
US 10,187,599 · App. 15/471,494 · Granted Jan 22, 2019

Pixel signal readout device, method thereof, and CMOS image sensor including the same

Inventor: Tae-Gyu Kim (Gyeonggi-do, KR)
Assignee: SK Hynix Inc.
H04N5/378H04N5/374
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Quick Facts
Patent No.
US 10,187,599
App. No.
15/471,494
Granted
Jan 22, 2019
Kind
B2
Abstract

A pixel signal readout device includes a unit pixel including a drive transistor and a reset transistor; and a column select transistor suitable for outputting a voltage applied to one terminal thereof, to a common terminal of the drive transistor and the reset transistor through the other terminal thereof, in response to a column select control signal applied to a gate terminal thereof.

Claims (57)

1. A pixel signal readout device comprising:

a unit pixel including a drive transistor and a reset transistor; and

a column select transistor suitable for outputting a voltage applied to one terminal thereof, to a common terminal of the drive transistor and the reset transistor through the other terminal thereof, in response to a column select control signal applied to a gate terminal thereof.

2. The pixel signal readout device according to claim 1 , wherein the unit pixel comprises:

a photodetector;

the reset transistor suitable for transferring the voltage from the other terminal of the column select transistor, to a floating diffusion node coupled to the other terminal thereof, in response to a reset control signal applied to a gate terminal thereof;

a transfer transistor suitable for transferring photocharges of the photodetector coupled to one terminal thereof, to the floating diffusion node coupled to the other terminal thereof, in response to a transfer control signal applied to a gate terminal thereof;

the drive transistor coupled to the other terminal of the column select transistor through the one terminal thereof, and suitable for generating an electrical signal corresponding to charges accumulated in the floating diffusion node coupled to a gate terminal thereof and outputting the electrical signal through the other terminal thereof; and

a select transistor suitable for outputting the electrical signal from the drive transistor, applied to one terminal thereof, through the other terminal thereof, as a pixel signal, in response to a select control signal applied to a gate terminal thereof.

3. The pixel signal readout device according to claim 2 ,

wherein the photodetector generates photocharges corresponding to incident light,

wherein the transfer transistor transfers the photocharges of the photodetector coupled to a source terminal thereof, to the floating diffusion node coupled to a drain terminal thereof, in response to the transfer control signal;

wherein the reset transistor transfers the voltage applied to a drain terminal thereof from a source terminal of the column select transistor, to the floating diffusion node coupled to a source terminal thereof, in response to the reset control signal, and thereby resets the floating diffusion node,

wherein the drive transistor is coupled to the source terminal of the column select transistor through a drain terminal thereof, generates an electrical signal corresponding to charges accumulated in the floating diffusion node, and outputs the electrical signal through a source terminal thereof to a drain terminal of the select transistor, and

wherein the select transistor, in response to the select control signal, outputs the electrical signal, applied to the drain terminal thereof, through a source terminal thereof, as the pixel signal.

4. The pixel signal readout device according to claim 2 , wherein the drive transistor extracts a threshold voltage by forming a diode connection with respect to an output node.

5. The pixel signal readout device according to claim 4 , wherein, in a state in which a diode connection is formed as the reset transistor is turned on in response to the reset control signal with a high level, the select transistor is turned on in response to a select control signal with a high level and the column select transistor is turned on in response to the column select control signal with a high level,

if the column select transistor is turned off in response to the column select control signal with a low level, a voltage of the gate terminal of the drive transistor converges by the threshold voltage in comparison with a voltage of the output node.

6. The pixel signal readout device according to claim 1 , further comprising:

a pixel signal loading line initializer suitable for initializing a pixel signal loading line by using a reference voltage.

7. The pixel signal readout device according to claim 6 , wherein the pixel signal loading line initializer comprises:

a buffer suitable for receiving the reference voltage from an external reference voltage generator, and transferring the reference voltage; and

a pixel signal loading line initialization switch suitable for, in response to an initialization control signal, supplying the reference voltage from the buffer, to the pixel signal loading line.

8. The pixel signal readout device according to claim 1 , wherein the column select transistor operates in response to the column select control signal, and outputs a voltage applied to a drain terminal thereof, to the drain terminals of the reset transistor and the drive transistor, through a source terminal thereof.

9. A pixel signal readout method comprising:

resetting a photodetector;

performing photoelectric conversion by the photodetector;

forming a diode connection by a drive transistor with respect to an output node depending on an operation of a column select transistor when resetting a floating diffusion node coupled to the drive transistor;

extracting a threshold voltage of the drive transistor;

compensating for the extracted threshold voltage by transferring photocharges by the photodetector to the floating diffusion node; and

reading out the compensated threshold voltage as a pixel signal.

10. The pixel signal readout method according to claim 9 , wherein, in the resetting of the photodetector, the photodetector is reset during a period in which a transfer control signal, a reset control signal and a column select control signal are enabled.

11. The pixel signal readout method according to claim 10 , wherein, in the forming of the diode connection, after the column select transistor is turned on in response to the column select control signal with a high level,

if a reset transistor is turned on in response to the reset control signal with a high level and a select transistor is turned on in response to a select control signal with a high level,

the drive transistor forms the diode connection with respect to the output node.

12. The pixel signal readout method according to claim 11 , wherein, in the extracting of the threshold voltage, in a state in which the reset transistor is turned on in response to the reset control signal with the high level and the select transistor is turned on in response to the select control signal with the high level,

if the column select transistor is turned off in response to the column select control signal with a low level,

a voltage of a gate terminal of the drive transistor converges by the threshold voltage in comparison with a voltage of the output node.

13. The pixel signal readout method according to claim 11 , wherein, in the compensating for the extracted threshold voltage, after the reset transistor is turned off in response to the reset control signal with a low level,

if a transfer transistor is turned on in response to a transfer control signal with a high level in a state in which the select transistor is turned on in response to the select control signal with the high level,

photocharges corresponding to an image signal are transferred from the photodetector to the floating diffusion node, and the voltage of the gate terminal of the drive transistor is changed based on the extracted threshold voltage.

14. The pixel signal readout method according to claim 9 , further comprising:

initializing a pixel signal loading line by using a reference voltage.

15. A complementary metal oxide semiconductor (CMOS) image sensor comprising:

a pixel array suitable for outputting pixel signals corresponding to incident light by using a plurality of unit pixels each of which includes a drive transistor and a reset transistor; and

a plurality of column select transistors each suitable for outputting a voltage applied to one terminal thereof, to a common terminal of the drive transistor and the reset transistor of a corresponding column through the other terminal thereof, in response to a column select control signal applied to a gate terminal thereof.

16. The CMOS image sensor according to claim 15 , further comprising:

a pixel signal loading line initialization unit suitable for initializing pixel signal loading lines of respective columns by using a reference voltage.

17. The CMOS image sensor according to claim 16 , wherein the pixel signal loading line initialization unit comprises:

a buffer suitable for receiving the reference voltage from an external reference voltage generator, and transferring the reference voltage;

a plurality of pixel signal loading line initialization switches suitable for, in response to an initialization control signal, supplying the reference voltage from the buffer, to the pixel signal loading lines of the respective columns; and

a plurality of current sources suitable for supplying current to the pixel signal loading lines of the respective columns.

18. The CMOS image sensor according to claim 15 , wherein the drive transistor extracts a threshold voltage by forming a diode connection with respect to an output node.

19. The CMOS image sensor according to claim 15 , wherein, in a state in which a diode connection is formed as the reset transistor is turned on in response to the reset control signal with a high level, the select transistor is turned on in response to a select control signal with a high level and the column select transistor is turned on in response to the column select control signal with a high level,

if the column select transistor is turned off in response to the column select control signal with a low level,

a voltage of the gate terminal of the drive transistor converges by the threshold voltage in comparison with a voltage of the output node.

20. The CMOS image sensor according to claim 15 , wherein each of the plurality of column select transistors, in response to the column select control signal applied to the gate terminal thereof, outputs a voltage applied to a drain terminal thereof, to the drain terminals of the reset transistor and the drive transistor, through a source terminal thereof.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2017
From: KIM, TAE-GYU
To: SK HYNIX INC.
Reel/Frame 042107/0520 →
Priority Claims (1)
KR 10-2016-0088500 · Jul 13, 2016 · national
Continuity (1)
Related Publication 20180020176A1 · Jan 18, 2018