Butted Body Contact for SOI Transistor
Systems, methods, and apparatus for an improved body tie construction that produces all the benefits of conventional body tie (H-gate, T-gate), without the limitations and degradations associated with those constructions are described. The improved body tie construction is configured to have a lower resistance body tie when the transistor is “off” (Vg approximately 0 volts). When the transistor is “on” (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie.
1 . A circuital arrangement of stacked transistors, comprising:
a) a first transistor of the stacked transistors, comprising:
a1) a first source region having a second conductivity type;
a2) a first drain region having the second conductivity type; and
a3) a first gate polysilicon structure defining: a first body region of a first conductivity type between the first source region and the first drain region, and at least one first body tab region of the first conductivity type that extends from the first body region into the first source region;
b) a second transistor of the stacked transistors, comprising:
b1) a second source region having the second conductivity type;
b2) a second drain region having the second conductivity type, the first source region and the second drain region defining a common source/drain region having the second conductivity type;
b3) a second gate polysilicon structure defining a second body region of the first conductivity type between the second source region and the second drain region; and
c) at least one first body contact region of the first conductivity type in contact with and contained within the common source/drain region, the at least one first body contact region being separate from the first and the second body regions,
wherein the at least one first body tab region is in contact with the first body contact region at a distal end of the at least one first body tab region,
and wherein the at least one first body tab region is configured to electrically connect the at least one first body contact region to the first body region.
2 . The circuital arrangement according to claim 1 , wherein:
the first transistor is a first field-effect transistor (FET),
the second transistor is a second field-effect transistor (FET), and
the first FET and the second FET are each a silicon-on-insulator (SOI) FET, fabricated using a silicon-on-insulator (SOI) technology.
3 . The circuital arrangement according to claim 2 , wherein a silicon layer of the SOI first FET and SOI second FET is a thin-film silicon layer.
4 . The circuital arrangement according to claim 1 , wherein the first gate polysilicon structure further defines a second body tab region of the first conductivity type that extends from the first body region to make contact with the at least one first body contact region at a distal end of the second body tab region, the second body tab region configured to electrically connect the at least one first body contact region to the first body region.
5 . The circuital arrangement according to claim 4 , wherein the at least one first body contact region comprises two first body contact regions configured to electrically connect to a respective one of the first body tab region and the second body tab region.
6 . The circuital arrangement according to claim 1 , further comprising:
at least one second body contact region of the first conductivity type separate from the first and the second body regions; and
a second body tab region of the first conductivity type defined by the second gate polysilicon structure,
wherein the second body tab region extends from the second body region and is in contact with the at least one second body contact region at a distal end of the second body tab region,
and wherein the second body tab region is configured to electrically connect the at least one second body contact region to the second body region.
7 . The circuital arrangement according to claim 6 , wherein the at least one second body contact region is in contact with and abuts the second source region.
8 . The circuital arrangement according to claim 6 , wherein the at least one second body contact region is fully contained within the second source region.
9 . The circuital arrangement according to claim 8 , wherein the at least one second body contact region is partially contained within the second source region.
10 . The circuital arrangement according to claim 9 , wherein the second gate polysilicon structure further defines a region of the first conductivity type that surrounds portions of the at least one second body contact region and separates the at least one second body contact region from the second source region.
11 . The circuital arrangement according to claim 6 , further comprising:
e) a third transistor of the stacked transistors, comprising:
e1) a third source region having the second conductivity type;
e2) a third drain region having the second conductivity type, the second source region and the third drain region defining a common source/drain region having the second conductivity type; and
e3) a third gate polysilicon structure defining a third body region of the first conductivity type between the third source region and the third drain region.
12 . The circuital arrangement according to claim 11 , wherein the third gate polysilicon structure further defines:
a third body tab region of the first conductivity type that extends from the third body region to the common source/drain region defined by the second source region and the third drain region, the third body tab region being in contact with the at least one second body contact region at a distal end of the third body tab region, the third body tab region configured to electrically connect the at least one second body contact region to the third body region, and
a region of the first conductivity type that completely surrounds the at least one second body contact region and separates the at least one second body contact region from the common source/drain region defined by the second source region and the third drain region.
13 . The circuital arrangement according to claim 11 , further comprising:
at least one third body contact region of the first conductivity type separate from the first, second and third body regions; and
a third body tab region of the first conductivity type defined by the third gate polysilicon structure that extends from the third body region into the third source region and is in contact with the at least one third body contact region at a distal end of the third body tab region, the third body tab region configured to electrically connect the at least one third body contact region to the third body region.
14 . The circuital arrangement according to claim 13 , wherein the at least one third body contact region is in contact with and abuts the third source region.
15 . The circuital arrangement according to claim 13 , wherein the at least one third body contact region is fully or partially contained within the third source region.
16 . The circuital arrangement according to claim 15 , wherein the at least one third body contact region is in contact with the third source region.
17 . The circuital arrangement according to claim 1 , further comprising:
an insulating layer; and
a silicon layer overlying the insulating layer,
wherein the first and second drain regions, the first and second body regions, the first and second source regions, the at least one body contact region, and the at least one first body tab are formed in the silicon layer and extend through the silicon layer to reach the insulating layer.
18 . The circuital arrangement according to claim 1 , wherein the first and the second transistors are N-type MOSFETs with associated drain region and source region being N+ type regions, the associated body region and the at least one body tab being P-type regions, and the at least one body contact being a P+ type region.
19 . The circuital arrangement according to claim 1 , wherein the first and the second transistors are P-type MOSFETs with associated drain region and the source region being P+ type regions, the associated body region and the at least one body tab being N-type regions, and the at least one body contact being a N+ type region.