IP Library Granted Patent US 10,475,389
Granted Patent B2
US 10,475,389 · App. 15/492,758 · Granted Nov 12, 2019

Display device

Inventors: Byung Sun Kim (Yongin-si, KR); Sun Ja Kwon (Yongin-si, KR); Yang Wan Kim (Yongin-si, KR); Hyun Ae Park (Yongin-si, KR); Hyung Jun Park (Yongin-Si, KR); Su Jin Lee (Yongin-Si, KR); Jae Yong Lee (Yongin-si, KR); Yu Jin Jeon (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/3266G09G3/3233G09G3/3275G09G2300/0413G09G2300/0426G09G2300/0814G09G2300/0819G09G2300/0842G09G2300/0861G09G2310/0232G09G2310/0281G09G2310/0286G09G2310/08G09G2320/0233
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,475,389
App. No.
15/492,758
Granted
Nov 12, 2019
Kind
B2
Abstract

A display device includes first pixels configured to be positioned in a first pixel area and configured to be connected to first scan lines; first scan stage circuits configured to be positioned in a first peripheral area that is positioned outside the first pixel area and configured to supply first scan signals to the first scan lines; second pixels configured to be positioned in a second pixel area and configured to be connected to second scan lines; and second scan stage circuits configured to be positioned in a second peripheral area that is positioned outside the second pixel area and configured to supply second scan signals to the second scan lines. A gap between adjacent second scan stage circuits is larger than a gap between adjacent first scan stage circuits.

Claims (61)

1. A display device comprising:

first pixels configured to be positioned in a first pixel area and configured to be connected to first scan lines;

first scan stage circuits configured to be positioned in a first peripheral area that is positioned outside the first pixel area and configured to supply first scan signals to the first scan lines;

second pixels configured to be positioned in a second pixel area and configured to be connected to second scan lines; and

second scan stage circuits configured to be positioned in a second peripheral area that is positioned outside the second pixel area and configured to supply second scan signals to the second scan lines; and

dummy scan stage circuits configured to be positioned between adjacent second scan stage circuits,

wherein a gap between adjacent second scan stage circuits is larger than a gap between adjacent first scan stage circuits.

2. The display device according to claim 1 , wherein the second pixel area has a width smaller than a width of the first pixel area.

3. The display device according to claim 1 , wherein the gap between the adjacent second scan stage circuits is set differently from each other according to a position.

4. The display device according to claim 1 , wherein the number of the dummy scan stage circuits is set differently according to a position.

5. The display device according to claim 1 ,

wherein the second scan stage circuits include a first pair of the adjacent second scan stage circuits and a second pair of the adjacent second scan stage circuits, and

wherein a gap between the second pair of the adjacent second scan stage circuits is larger than a gap between the first pair of the adjacent second scan stage circuits.

6. The display device according to claim 5 , further comprising:

at least one first dummy scan stage circuit that is disposed between the first pair of the adjacent second scan stage circuits; and

second dummy scan stage circuits that are disposed between the second pair of the adjacent second scan stage circuits,

wherein the number of the second dummy scan stage circuits is larger than the number of the first dummy scan stage circuit.

7. The display device according to claim 5 , wherein the second pair of the adjacent second scan stage circuits is farther away from the first peripheral area than the first pair of the adjacent second scan stage circuits.

8. The display device according to claim 1 , further comprising:

third pixels configured to be positioned in a third pixel area and configured to be connected to third scan lines; and

third scan stage circuits configured to be positioned in a third peripheral area that is positioned outside the third pixel area and configured to supply third scan signals to the third scan lines.

9. The display device according to claim 8 , wherein the third pixel area has a width smaller than a width of the first pixel area, and is positioned to be separated from the second pixel area.

10. The display device according to claim 8 , wherein a gap between adjacent third scan stage circuits is larger than a gap between the adjacent first scan stage circuits.

11. The display device according to claim 8 , wherein a gap between the adjacent third scan stage circuits is set differently from each other according to a position.

12. The display device according to claim 11 , further comprising:

dummy scan stage circuits configured to be positioned between the adjacent third scan stage circuits.

13. The display device according to claim 12 , wherein the number of the dummy scan stage circuits is set differently according to a position.

14. The display device according to claim 8 ,

wherein the first scan stage circuits are electrically connected to the first scan lines through the first scan routing wires,

wherein the second scan stage circuits are electrically connected to the second scan lines through the second scan routing wires,

wherein the third scan stage circuits are electrically connected to the third scan lines through the third scan routing wires, and

wherein lengths of the second scan routing wires and the third scan routing wires are larger than lengths of the first scan routing wires.

15. A display device comprising:

first pixels configured to be positioned in a first pixel area and configured to be connected to first scan lines;

first scan stage circuits configured to be positioned in a first peripheral area that is positioned outside the first pixel area and configured to supply first scan signals to the first scan lines;

second pixels configured to be positioned in a second pixel area and configured to be connected to second scan lines; and

second scan stage circuits configured to be positioned in a second peripheral area that is positioned outside the second pixel area and configured to supply second scan signals to the second scan lines,

wherein a gap between adjacent second scan stage circuits is larger than a gap between adjacent first scan stage circuits,

wherein the first pixel area includes a first sub-pixel area and a second sub-pixel area,

wherein the first peripheral area includes a first sub-peripheral area that is positioned outside the first sub-pixel area, and a second sub-peripheral area that is positioned outside the second sub-pixel area, and

wherein a gap between a pair of the adjacent first scan stage circuits that are positioned in the second sub-peripheral area is larger than a gap between a pair of the adjacent first scan stage circuits that are positioned in the first sub-peripheral area.

16. The display device according to claim 15 ,

wherein the first sub-pixel area is positioned between the second pixel area and the second sub-pixel area, and

wherein the first sub-peripheral area is positioned between the second peripheral area and the second sub-peripheral area.

17. A display device comprising:

first pixels configured to be positioned in a first pixel area and configured to be connected to first scan lines;

first scan stage circuits configured to be positioned in a first peripheral area that is positioned outside the first pixel area and configured to supply first scan signals to the first scan lines;

second pixels configured to be positioned in a second pixel area and configured to be connected to second scan lines; and

second scan stage circuits configured to be positioned in a second peripheral area that is positioned outside the second pixel area and configured to supply second scan signals to the second scan lines,

wherein a gap between adjacent second scan stage circuits is larger than a gap between adjacent first scan stage circuits,

wherein the first scan stage circuits are electrically connected to the first scan lines through first scan routing wires,

wherein the second scan stage circuits are electrically connected to the second scan lines through second scan routing wires, and

wherein lengths of the second scan routing wires are larger than lengths of the first scan routing wires.

18. A display device comprising:

first pixels configured to be positioned in a first pixel area;

second pixels configured to be positioned in a second pixel area;

first emission stage circuits configured to be positioned in a first peripheral area and configured to supply first emission control signals to the first pixels through first emission control lines;

second emission stage circuits configured to be positioned in a second peripheral area and configured to supply second emission control signals to the second pixels through second emission control lines; and

dummy emission stage circuits configured to be positioned between the adjacent second emission stage circuits,

wherein a gap between adjacent second emission stage circuits is larger than a gap between adjacent first emission stage circuits.

19. The display device according to claim 18 , wherein the number of the dummy emission stage circuits is set differently according to a position.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2017
From: KIM, BYUNG SUN; KWON, SUN JA; KIM, YANG WAN; PARK, HYUN AE; PARK, HYUNG JUN; LEE, SU JIN; LEE, JAE YONG; JEON, YU JIN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 042302/0079 →
Priority Claims (1)
KR 10-2016-0117555 · Sep 12, 2016 · national
Continuity (1)
Related Publication 20180075810A1 · Mar 15, 2018
Cited By (2)
US 50,600 US 12,245,491