IP Library Granted Patent US 10,304,914
Granted Patent B2
US 10,304,914 · App. 15/494,590 · Granted May 28, 2019

Display device with trench passing through partition wall

Inventor: Masakazu Gunji (Tokyo, JP)
Assignee: Japan Display Inc.
H01L27/3246H01L27/124H01L27/1463H01L27/322H01L27/3211H01L27/3244H01L27/3258H01L27/3262H01L51/0097H01L51/5278H01L27/326H01L2227/323H01L2251/5338Y02E10/549
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Quick Facts
Patent No.
US 10,304,914
App. No.
15/494,590
Granted
May 28, 2019
Kind
B2
Abstract

Provided is a display device including a first sub-pixel, a second sub-pixel adjacent to the first sub-pixel. The first sub-pixel and the second sub-pixel each include a semiconductor film, a gate electrode, a gate insulating film, an interlayer insulating film, and a leveling film and further possesses a light-emitting element located over the leveling film. The display device has a partition wall located between the first sub-pixel and the second sub-pixel and a trench passing through the leveling film.

Claims (88)

1. A display device comprising:

a first sub-pixel;

a second sub-pixel adjacent to the first sub-pixel; and

a partition wall located at a boundary between the first sub-pixel and the second sub-pixel, the first sub-pixel and the second sub-pixel each comprising:

a thin-film transistor including a semiconductor film, a gate electrode, a source electrode, and a drain electrode, the source electrode and the drain electrode being electrically connected to the semiconductor film;

a gate insulating film between the semiconductor film and the gate electrode;

an interlayer insulating film over the semiconductor film, the gate electrode, and the gate insulating film and under the source electrode and the drain electrode;

a leveling film over the source electrode and the drain electrode; and

a light-emitting element over the leveling film, the light-emitting element including an EL layer between a first electrode and a second electrode,

wherein:

an edge portion of the first electrode is covered by the partition wall;

a part of the second electrode is located over the partition wall;

an overlapping region where the leveling film overlaps with the partition wall in a plane view is located between the first sub-pixel and the second sub-pixel;

a trench passing through the leveling film and the partition wall is located in the overlapping region; and

the EL layer is in contact with the interlayer insulating film via the trench.

2. The display device according to claim 1 , further comprising a gate line,

wherein:

the gate line is electrically connected to a pixel circuit of the first sub-pixel and a pixel circuit of the second sub-pixel; and

the trench extends in a direction parallel to the gate line.

3. The display device according to claim 1 , further comprising a gate line,

wherein:

the gate line is electrically connected to a pixel circuit of the first sub-pixel and a pixel circuit of the second sub-pixel; and

the trench extends in a direction perpendicular to the gate line.

4. The display device according to claim 3 , further comprising:

a current-supplying line configured to supply current to the pixel circuit of the first sub-pixel; and

a signal line configured to supply an image signal to the pixel circuit of the second sub-pixel,

wherein the trench is located between the current-supplying line and the signal line.

5. The display device according to claim 1 , further comprising a flexible base material,

wherein the first sub-pixel and the second sub-pixel are located over the flexible base material.

6. The display device according to claim 1 , further comprising a plurality of sub-pixels including the first sub-pixel and the second sub-pixel,

wherein the trench surrounds each of the plurality of sub-pixels.

7. The display device according to claim 1 , further comprising a plurality of sub-pixels including the first sub-pixel and the second sub-pixel,

wherein the trench surrounds more than one sub-pixels of the plurality of sub-pixels.

8. A display device comprising:

a first pixel;

a second pixel adjacent to the first pixel; and

a partition wall located at a boundary between the first pixel and the second pixel, the first pixel and the second pixel each including a first sub-pixel,

wherein the first sub-pixel comprising:

a thin-film transistor having a semiconductor film, a gate electrode, a source electrode, and a drain electrode, the source electrode and the drain electrode being electrically connected to the semiconductor film;

a gate insulating film between the semiconductor film and the gate electrode;

an interlayer insulating film over the semiconductor film, the gate electrode, and the gate insulating film and under the source electrode and the drain electrode;

a leveling film over the source electrode and the drain electrode; and

a light-emitting element over the leveling film, the light-emitting element including an EL layer between a first electrode and a second electrode,

an edge portion of the first electrode is covered by the partition wall,

a part of the second electrode is located over the partition wall,

an overlapping region where the leveling film overlaps with the partition wall in a plane view is located between the first pixel and the second pixel,

a trench passing through the partition wall and reaching at least a part of the leveling film is located in the overlapping region, and

the EL layer is in contact with a bottom surface of the trench.

9. The display device according to claim 8 ,

wherein a thickness of the leveling film in the trench is smaller than a thickness of the leveling film facing the first sub-pixel.

10. The display device according to claim 8 , further comprising a gate line,

wherein:

the gate line is electrically connected to a pixel circuit in the first pixel and a pixel circuit in the second pixel; and

the trench extends in a direction perpendicular to the gate line and overlaps with the gate line.

11. The display device according to claim 8 , further comprising a signal line,

the signal line is electrically connected to a pixel circuit in the first pixel and a pixel circuit in the second pixel; and

the trench extends in a direction intersecting the signal line and overlaps with the signal line.

12. The display device according to claim 8 , further comprising:

a signal line; and

a second interlayer insulating film on and in contact with the interlayer insulating film,

wherein:

the signal line is electrically connected to a pixel circuit in the first pixel and a pixel circuit in the second pixel;

the signal line is divided into two portions in a region overlapping with the trench;

the two portions are electrically connected to each other via a connection electrode; and

the connection electrode is located between the interlayer insulating film and the second interlayer insulating film.

13. The display device according to claim 8 , further comprising:

a gate line; and

a second interlayer insulating film on and in contact with the interlayer insulating film,

wherein:

the gate line is electrically connected to a pixel circuit in the first pixel and a pixel circuit in the second pixel;

the gate line is divided into two portions in a region overlapping with the trench;

the two portions are electrically connected to each other via a connection electrode; and

the connection electrode is located between the interlayer insulating film and the second interlayer insulating film.

14. The display device according to claim 8 , further comprising:

a gate line electrically connected to a pixel circuit in the first pixel and a pixel circuit in the second pixel; and

a signal line electrically connected to one of the pixel circuit in the first pixel and the pixel circuit in the second pixel,

wherein the trench extends in a direction parallel to the signal line and is divided in a region overlapping with the gate line.

15. The display device according to claim 8 , further comprising:

a gate line electrically connected to a pixel circuit in the first pixel and a pixel circuit in the second pixel; and

a signal line electrically connected to one of the pixel circuit in the first pixel and the pixel circuit in the second pixel,

wherein the trench extends in a direction parallel to the gate line and is divided in a region overlapping with the signal line.

16. The display device according to claim 8 ,

wherein:

the trench passes through the leveling film;

the bottom surface of the trench is a top surface of the interlayer insulating film, the top surface being exposed by the trench and being not in contact with the leveling film; and

the EL layer is in contact with the top surface.

17. The display device according to claim 8 , further comprising a plurality of pixels including the first pixel and the second pixel,

wherein the trench demarcates more than one pixels of the plurality of pixels in an island shape.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2017
From: GUNJI, MASAKAZU
To: JAPAN DISPLAY INC.
Reel/Frame 042122/0605 →
Priority Claims (1)
JP 2016-135669 · Jul 8, 2016 · national
Continuity (1)
Related Publication 20180012944A1 · Jan 11, 2018
Cited By (3)
US 12,278,223 US 12,596,446 US 12,690,352