IP Library Granted Patent US 10,333,413
Granted Patent B2
US 10,333,413 · App. 15/498,051 · Granted Jun 25, 2019

System and method for automatically and adaptively enhancing transient response for a plurality of output voltages

Inventors: Wei-Cheng Yu (New Taipei, TW); Merle J. Wood (Round Rock, TX); Adie Tan (Austin, TX); Tsung-Cheng Liao (Taoyuan, TW); Tun-Chieh Liang (Taipei, TW)
Assignee: Dell Products, LP
H02M3/33523G06F1/26G06F1/263G06F1/3287G06F1/3296H02M3/33515H02M2001/0025
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Quick Facts
Patent No.
US 10,333,413
App. No.
15/498,051
Granted
Jun 25, 2019
Kind
B2
Abstract

A system and method of operating an automatic variable voltage transient response management system comprising a switchable power regulator circuit for receiving an input voltage and generating a plurality of output voltages for an information handling system the switchable power regulator circuit including a feedback loop for an adaptable error amplifier circuit, and a memory for storing a control circuit resistance table wherein each of the plurality of output voltages are associated in the control circuit resistance table with one of a plurality of total control circuit resistance values to adapt the error amplifier circuit feedback gain, and a digital core processor executing code instructions of the automatic variable voltage transient response management system to determine a requested regulated output voltage, identify one of the plurality of the total control circuit resistances associated with the requested regulated output voltage of the plurality of output voltages in the controller resistance table, and to activate an adaptable resistance control circuit to apply the identified total control circuit resistance.

Claims (52)

1. An information handling system operating an automatic variable voltage transient response management system comprising:

a switchable power regulator circuit for receiving alternating current (AC) input voltage and generating a plurality of direct current (DC) output voltages for an information handling system including:

a rectifier and a pulse-width modulation circuit operable to receive an input AC voltage; and

a transformer to generate one of the plurality of DC output voltages being operably connected in a feedback loop for an adaptable error amplifier circuit;

a memory for storing a control circuit resistance table;

the adaptable error amplifier circuit of the switchable power regulator circuit being operable to generate a reference voltage, compare the DC output voltage, and to regulate each of the plurality of DC output voltages for output voltage stability, wherein each of the plurality of DC output voltages is associated in the control circuit resistance table with one of a plurality of total control circuit resistances to adapt the error amplifier circuit feedback gain; and

a digital core processor executing code instructions of the automatic variable voltage transient response management system to determine a requested regulated DC output voltage, identify one of the plurality of the total control circuit resistances associated with the requested regulated DC output voltage of the plurality of DC output voltages in the controller resistance table, and to activate an adaptable resistance control circuit to apply the identified total control circuit resistance.

2. The information handling system operating the automatic variable voltage transient response management system of claim 1 further comprising:

the adaptable resistance control circuit including a default resistor operating in parallel with one or more of a plurality of controlled resistors to generate one of the plurality of total control circuit resistances by selective activation of the parallel controlled resistors.

3. The information handling system operating the automatic variable voltage transient response management system of claim 2 further comprising:

one or more controller transistors, each controller transistor placed in series with one of the plurality of controlled resistors to activate the controlled resistors upon receiving a general purpose input/output (GPIO) signal to the gate of the in-series controller transistor.

4. The information handling system operating the automatic variable voltage transient response management system of claim 1 further comprising:

a soft start circuit operably connected to the adaptable error amplifier circuit operating to cause a startup current and a startup output voltage to rise linearly following startup of a load.

5. The information handling system operating the automatic variable voltage transient response management system of claim 1 further comprising:

the processor executing machine readable executable code instructions of the automatic variable voltage transient response management system to detect an output voltage exceeding a preset voltage threshold, to identify a protective total control circuit resistance capable of initiating a protection latch mode, and to direct the adaptable resistance control circuit to apply the identified protective total control circuit resistance.

6. The information handling system operating the automatic variable voltage transient response management system of claim 1 , wherein the identified total control circuit resistance for determining feedback gain needed to achieve the optimized crossover frequency associated with the requested regulated DC output voltage is determined by optimizing a crossover frequency of the requested regulated DC output voltage for one or more optimization characteristics.

7. The information handling system operating the automatic variable voltage transient response management system of claim 6 , wherein the one or more optimization characteristics include phase margin, switching frequency, output ripple, output undershoot, or absence of a right half-plane zero.

8. A method of automatically managing transient response of a switchable power regulator circuit for a plurality of preset regulated output voltages comprising:

identifying, via a processor a total control circuit resistance for generating an adaptable error amplifier circuit feedback gain needed to achieve a crossover frequency of one of the plurality of preset regulated output voltages optimized for one or more optimization characteristics;

associating the total control circuit resistance with the one of the plurality of preset regulated output voltages having an optimized crossover frequency in a control circuit resistance table stored in a memory associating each of the plurality of preset regulated output voltages with one of a plurality of total control circuit resistances for adapting the adaptable error amplifier circuit feedback gain;

generating, via a transformer of a switchable power regulator circuit operably connected in a feedback loop for the adaptable error amplifier circuit, the one of the plurality of preset regulated output voltages associated with the total control circuit resistance in the control circuit resistance table;

determining, via a processor, a requested regulated output voltage equivalent to the one of the plurality of preset regulated output voltages associated with the total control circuit resistance in the control circuit resistance table;

adapting the adaptable error amplifier circuit gain by activating an adaptable resistance control circuit to apply the total control circuit resistance associated with the one of the plurality of preset regulated output voltages to regulate the one of the plurality of preset regulated output voltages for output voltage stability.

9. The method of automatically managing transient response of multiple output voltages of claim 8 further comprising:

applying the total control circuit resistance associated with the one of the plurality of preset regulated output voltages by selectively activating one or more parallel controlled resistors operating in parallel with a default resistor of the adaptable resistance control circuit.

10. The method of automatically managing transient response of multiple output voltages of claim 9 further comprising:

activating the one or more parallel controlled resistors upon receiving a general purpose input/output (GPIO) signal to the gate of a controller transistor placed in series with the one or more parallel controlled resistors.

11. The method of automatically managing transient response of multiple output voltages of claim 8 , wherein the one or more optimization characteristics includes phase margin, switching frequency, output ripple, output undershoot, or absence of a right half-plane zero.

12. The method of automatically managing transient response of multiple output voltages of claim 8 , wherein the plurality of preset regulated output voltages includes 5V, 9V, 15V, and 20V.

13. The method of automatically managing transient response of multiple output voltages of claim 8 further comprising:

causing a startup current and a startup output voltage to rise linearly following startup of a load, via a soft start circuit operably connected to the adaptable error amplifier circuit.

14. The method of automatically managing transient response of multiple output voltages of claim 8 further comprising:

detecting an output voltage exceeding a preset voltage threshold;

identifying a protective total control circuit resistance within the control circuit resistance table capable of initiating a protection latch mode of the switchable power regulator circuit; and

directing the adaptable resistance control circuit to apply the identified protective total control circuit resistance.

15. A switchable power regulator circuit operating an automatic variable voltage transient response management system for an information handling system comprising:

the switchable power regulator circuit receiving alternating current (AC) input voltage and generating a plurality of direct current (DC) output voltages for an information handling system;

a memory for storing a control circuit resistance table associating a total control circuit resistance for adjusting gain with each of the plurality of DC output voltages;

the switchable power regulator circuit including a transformer operable to generate a DC output voltage selected from the plurality of DC output voltages;

the transformer being operably connected in a feedback loop for an adaptable error amplifier circuit;

the adaptable error amplifier circuit generating a reference voltage, comparing the reference voltage to the DC output voltage to regulate the DC output voltage for stability, wherein each of the plurality of DC output voltages is associated in the control circuit resistance table with one of a plurality of total control circuit resistances to adapt the error amplifier circuit feedback gain;

a processor executing machine readable executable code instructions of the automatic variable voltage transient response management system to determine a requested regulated DC output voltage, identify one of a plurality of total control circuit resistances associated with the requested regulated DC output voltage of the plurality of DC output voltages in the controller resistance table, and to activate an adaptable resistance control circuit to apply the identified total control circuit resistance;

the adaptable resistance control circuit including a default resistor operating in parallel with one or more of a plurality of controlled resistors to generate one of the plurality of total control circuit resistances by selective activation of the parallel controlled resistors.

16. The switchable power regulator circuit operating the automatic variable voltage transient response management system of claim 15 further comprising:

a soft start circuit operably connected to the adaptable error amplifier circuit operating to cause a startup current and a startup output voltage to rise linearly following startup of a load.

17. The switchable power regulator circuit operating the automatic variable voltage transient response management system of claim 15 further comprising:

one or more controller transistors, each controller transistor placed in series with one of the plurality of controlled resistors; and

the processor sending a general purpose input/output (GPIO) signal to selectively activate at least one controller transistor associated with the controlled resistor to generate the total control circuit resistance.

18. The switchable power regulator circuit operating the automatic variable voltage transient response management system of claim 17 further comprising:

the processor executing machine readable executable code instructions of the automatic variable voltage transient response management system to detect an output voltage exceeding a preset voltage threshold, identify a protective total control circuit resistance within the controller resistance table capable of initiating a protection latch mode, and to direct the adaptable resistance control circuit to apply the identified protective total control circuit resistance.

19. The switchable power regulator circuit operating the automatic variable voltage transient response management system of claim 15 , wherein the identified total control circuit resistance is determined by optimizing a crossover frequency of the requested regulated DC output voltage for one or more optimization characteristics and determining a gain needed to achieve the optimized crossover frequency.

20. The switchable power regulator circuit operating the automatic variable voltage transient response management system of claim 19 , wherein the one or more optimization characteristics include phase margin, switching frequency, output ripple, output undershoot, or absence of a right half-plane zero.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (042769/0001) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0802 →
RELEASE OF SECURITY INTEREST AT REEL 042768 FRAME 0585 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058297/0536 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY INTEREST (CREDIT) Recorded Jun 12, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 042768/0585 →
PATENT SECURITY INTEREST (NOTES) Recorded Jun 12, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 042769/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2017
From: YU, WEI-CHENG; WOOD, MERLE J.; TAN, ADIE; LIAO, TSUNG-CHENG; LIANG, TUN-CHIEH
To: DELL PRODUCTS, LP
Reel/Frame 042154/0474 →
Continuity (1)
Related Publication 20180316272A1 · Nov 1, 2018