IP Library Granted Patent US 10,168,957
Granted Patent B2
US 10,168,957 · App. 15/498,689 · Granted Jan 1, 2019

Directed placemat of data in memory

Inventor: Christopher Philip Smith (Chepstow, GB)
Assignee: Imagination Technologies Limited
G06F3/0659G06F3/0604G06F3/064G06F3/0611G06F3/0673G06F9/44557
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Quick Facts
Patent No.
US 10,168,957
App. No.
15/498,689
Granted
Jan 1, 2019
Kind
B2
Abstract

A method of storing computer executable instructions and data elements of a program in a plurality of memory blocks of an embedded system. The method includes receiving object code that comprises instructions that symbolically refer to one or more data elements; metadata that identifies the data elements in the object code; and a data element description that identifies each of the data elements as either a regular data element or a non-regular data element. Executable code is generated based the object code, metadata and the data element description that comprises computer executable instructions that refer to the data elements using an address in the memory, wherein the regular data elements are referenced by an address in a non-instruction memory block of the plurality of memory blocks and the non-regular data elements are referenced by an address in an instruction memory block. The executable code is then loaded into the memory of the embedded system.

Claims (40)

1. A computer-implemented method of storing computer executable instructions and data elements of a program in a memory of an embedded system, the memory being divided into a plurality of memory blocks, the method comprising:

receiving object code comprising instructions that symbolically refer to one or more data elements;

receiving metadata that identifies the data elements in the object code;

receiving a data element description that identifies each of the data elements as either a regular data element or a non-regular data element;

generating, based on the object code, the metadata and the data element description, executable code that comprises computer executable instructions that refer to the one or more data elements using an address in the memory of the embedded system, wherein the regular data elements are referenced by an address in a non-instruction memory block of the plurality of memory blocks and the non-regular data elements are referenced by an address in an instruction memory block of the plurality of memory blocks; and

loading the executable code into the memory of the embedded system.

2. The method of claim 1 , wherein generating the executable code comprises:

generating, based on the object code, the metadata and the data element description, a linker script that causes a linker to allocate the regular data elements an address in an a non-instruction memory block of the plurality of memory blocks and allocate the non-regular data elements an address in an instruction memory block of the plurality of memory blocks; and

generating, using a linker, the executable code from the object code, the metadata and the generated linker script.

3. The method of claim 2 , wherein generating the linker script comprises designating one or more of the plurality of memory blocks as an instruction memory block based on a number and a size of the instructions in the object code.

4. The method of claim 3 , wherein generating the linker script further comprises designating the memory blocks of the plurality of memory blocks that were not designated as an instruction memory block as non-instruction memory blocks.

5. The method of claim 1 , wherein an instruction memory block is a memory block that is used to store one or more computer executable instructions.

6. The method of claim 1 , wherein a non-instruction memory block is a memory block that is not used to store one or more computer executable instructions.

7. The method of claim 1 , wherein the embedded system comprises a processor and execution of the executable code by the processor causes the processor to: access the regular data elements in a non-instruction memory block of the plurality of memory blocks, and access the non-regular data elements in an instruction memory block of the plurality of memory blocks.

8. The method of claim 7 , further comprising executing the executable code loaded into memory using the processor of the embedded system which causes the processor to: access the regular data elements in a non-instruction memory block of the plurality of memory blocks, and access the non-regular data elements in an instruction memory block of the plurality of memory blocks.

9. The method of claim 7 , wherein accessing a data element in a memory block comprises writing data to and/or reading data from the memory block.

10. The method of claim 1 , wherein a non-regular data element is a low-priority data element.

11. The method of claim 1 , wherein the embedded system is a radio processing unit.

12. An embedded system configured to execute a program, the embedded system obtained by performing the method as set forth in claim 1 to load executable code representing the program into a memory of the embedded system.

13. A system to store computer executable instructions and data elements of a program in a memory of an embedded system, the memory being divided into a plurality of memory blocks, the system comprising:

a linker script generator configured to:

receive object code comprising instructions that symbolically refer to one or more data elements;

receive metadata that identifies the data elements in the object code;

receive a data element description that identifies each of the data elements as either a regular data element or a non-regular data element; and

generate a linker script to cause a linker to allocate non-regular data elements an address in an instruction memory block of the plurality of memory blocks and to allocate regular data elements an address in a non-instruction memory block of the plurality of memory blocks;

a linker configured to:

generate, based on the object code, the metadata and the linker script, executable code that comprises computer executable instructions that refer to the one or more data elements using an address of the memory, wherein the regular data elements are referenced by an address in a non-instruction memory block of the plurality of memory blocks and the non-regular data elements are referenced by an address in an instruction memory block of the plurality of memory blocks; and

a loader configured to load the executable code into the memory of the embedded system.

14. The system of claim 13 , wherein the linker script generator is configured to generate the linker script by designating one or more of the plurality of memory blocks as an instruction memory block based on a number and a size of the instructions in the object code.

15. The system of claim 14 , wherein the linker script generator is further configured to generate the linker script by designating the memory blocks of the plurality of memory blocks that were not designated as an instruction memory block as non-instruction memory blocks.

16. The system of claim 13 , wherein an instruction memory block is a memory block that is used to store one or more computer executable instructions.

17. The system of claim 13 , wherein a non-instruction memory block is a memory block that is not used to store one or more computer executable instructions.

18. The system of claim 13 , further comprising the embedded system wherein the embedded system comprises a processor and execution of the executable code by the processor causes the processor to: access the regular data elements in a non-instruction memory block of the plurality of memory blocks, and access the non-regular data elements in an instruction memory block of the plurality of memory blocks.

19. The system of claim 18 , wherein accessing a data element in a memory block comprises writing data to and/or reading data from the memory block.

20. A non-transitory computer readable storage medium having stored thereon computer readable instructions that, when executed at a computing-based device, cause the computing-based device to perform the method of:

receiving object code comprising instructions that symbolically refer to one or more data elements;

receiving metadata that identifies the data elements in the object code;

receiving a data element description that identifies each of the data elements as either a regular data element or a non-regular data element;

generating, based on the object code, the metadata and the data element description, executable code that comprises computer executable instructions that refer to the one or more data elements using an address in memory of the embedded system, wherein the regular data elements are referenced by an address in a non-instruction memory block of the memory of the embedded system and the non-regular data elements are referenced by an address in an instruction memory block of the memory of the embedded system; and

loading the executable code into the memory of the embedded system.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2021
From: IMAGINATION TECHNOLOGIES LIMITED
To: NORDIC SEMICONDUCTOR ASA
Reel/Frame 055605/0038 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2018
From: SMITH, CHRISTOPHER PHILIP
To: IMAGINATION TECHNOLOGIES LIMITED
Reel/Frame 046679/0641 →
Priority Claims (1)
GB 1607448.6 · Apr 28, 2016 · national
Continuity (1)
Related Publication 20170315755A1 · Nov 2, 2017